XR16L580IM-F Exar Corporation, XR16L580IM-F Datasheet - Page 33
![IC UART FIFO 16B 48TQFP](/photos/16/10/161019/tqfp-48_sml.jpg)
XR16L580IM-F
Manufacturer Part Number
XR16L580IM-F
Description
IC UART FIFO 16B 48TQFP
Manufacturer
Exar Corporation
Datasheet
1.XR16L580IL24TR-F.pdf
(52 pages)
Specifications of XR16L580IM-F
Number Of Channels
1, UART
Package / Case
48-TQFP
Features
*
Fifo's
16 Byte
Protocol
RS232, RS422
Voltage - Supply
2.25 V ~ 5.5 V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
3.125 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.25 V
Supply Current
2 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
No. Of Channels
1
Uart Features
Selectable RX And TX FIFO Trigger Levels, Automatic Software Flow Control, Complete Modem Interface
Supply Voltage Range
2.25V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XR16L580IM-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
XR16L580IM-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
REV. 1.4.1
MSR[4]: CTS Input Status
CTS# pin may function as automatic hardware flow control signal input if it is enabled and selected by Auto
CTS (EFR bit-7). Auto CTS flow control allows starting and stopping of local data transmissions based on the
modem CTS# signal. A logic 1 on the CTS# pin will stop UART transmitter as soon as the current character
has finished transmission, and a logic 0 will resume data transmission. Normally MSR bit-4 bit is the
compliment of the CTS# input. However in the loopback mode, this bit is equivalent to the RTS# bit in the MCR
register. The CTS# input may be used as a general purpose input when the modem interface is not used.
MSR[5]: DSR Input Status
DSR# (active high, logical 1). Normally this bit is the compliment of the DSR# input. In the loopback mode, this
bit is equivalent to the DTR# bit in the MCR register. The DSR# input may be used as a general purpose input
when the modem interface is not used.
MSR[6]: RI Input Status
RI# (active high, logical 1). Normally this bit is the compliment of the RI# input. In the loopback mode this bit is
equivalent to bit-2 in the MCR register. The RI# input may be used as a general purpose input when the
modem interface is not used.
MSR[7]: CD Input Status
CD# (active high, logical 1). Normally this bit is the compliment of the CD# input. In the loopback mode this bit
is equivalent to bit-3 in the MCR register. The CD# input may be used as a general purpose input when the
modem interface is not used.
This is a 8-bit general purpose register for the user to store temporary data. The content of this register is
preserved during sleep mode but becomes 0xFF (default) after a reset or a power off-on cycle.
The concatenation of the contents of DLM and DLL gives the 16-bit divisor value which is used to calculate the
baud rate:
•
See MCR bit-7 and the baud rate table also.
This register contains the device ID (0x01 for XR16L580). Prior to reading this register, DLL and DLM should
be set to 0x00.
This register contains the device revision information. For example, 0x01 means revision A. Prior to reading
this register, DLL and DLM should be set to 0x00.
Enhanced features are enabled or disabled using this register. Bit 0-3 provide single or dual consecutive
character software flow control selection (see
are selected, the double 8-bit words are concatenated into two sequential characters. Caution: note that
whenever changing the TX or RX flow control bits, always reset all bits back to logic 0 (disable) before
programming a new setting.
EFR[3:0]: Software Flow Control Select
Single character and dual sequential characters software flow control is supported. Combinations of software
flow control can be selected by programming these bits.
4.11
4.12
4.13
4.14
4.15
Baud Rate = (Clock Frequency / 16) / Divisor
Scratchpad Register (SPR) - Read/Write
Baud Rate Generator Registers (DLL and DLM) - Read/Write
Device Identification Register (DVID) - Read Only
Device Revision Register (DREV) - Read Only
Enhanced Feature Register (EFR)
SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
Table 10
33
). When the Xon1 and Xon2 and Xoff1 and Xoff2 modes
XR16L580