M052LAN Nuvoton Technology Corporation of America, M052LAN Datasheet - Page 176

• Manufacturer Part Number: M052LAN
• Description: IC MCU 32BIT 8KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r

Specifications of M052LAN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

I2C SLAVE ADDRESS MASK REGISTER (I2CADMx)
Register
I2CADM0
I2CADM1
I2CADM2
I2CADM3
Bits
[31:8]
[7:1]
[0]
31
23
15
7
NuMicro M051
Offset
I2C_BA+0x24
I2C_BA+0x28
I2C_BA+0x2C
I2C_BA+0x30
Descriptions
Reserved
I2CADMx
Reserved
30
22
14
6
R/W Description
R/W I2C slave Address Mask Register0
R/W I2C slave Address Mask Register1
R/W I2C slave Address Mask Register2
R/W I2C slave Address Mask Register3
Reserved
I2C Address Mask register
1 = Mask enable (the received corresponding address bit is don’t care.)
0 = Mask disable (the received corresponding register bit should be exact
the same as address register.)
I2C bus controllers support multiple address recognition with four address
mask register. When the bit in the address mask register is set to one, it
means the received corresponding address bit is don’t-care. If the bit is set
to zero, that means the received corresponding register bit should be exact
the same as address register.
Reserved
29
21
13
5
™
I2CADMx[7:1]
Series Technical Reference Manual
28
20
12
4
Reserved
Reserved
Reserved
- 176 -
27
19
11
3
Publication Release Date: Sep 14, 2010
26
18
10
2
25
17
9
1
Revision V1.2
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reserved
24
16
8
0