M052LAN Nuvoton Technology Corporation of America, M052LAN Datasheet - Page 236

IC MCU 32BIT 8KB FLASH 48LQFP

M052LAN

Manufacturer Part Number
M052LAN
Description
IC MCU 32BIT 8KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro M051™r
Datasheets

Specifications of M052LAN

Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
40
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Word Suspend
These four bits field of SP_CYCLE (SPI_CNTRL [15:12]) provide a configurable suspend interval
2 ~ 17 serial clock periods between two successive transaction words in master mode. The
suspend interval is from the last falling clock edge of the preceding transaction word to the first
rising clock edge of the following transaction word if CLKP = 0. If CLKP = 1, the interval is from
the rising clock edge of the preceding transaction word to the falling clock edge of the following
transfer word. The default value of SP_CYCLE is 0x0 (2 serial clock cycles), but set these bits
field has no any effects on data transaction process if TX_NUM = 0x00.
Byte Reorder
When the transfer is set as MSB first (LSB = 0) and the REORDER is enabled, the data stored in
the TX buffer and RX buffer will be rearranged in the order as [BYTE0, BYTE1, BYTE2, BYTE3]
in TX_BIT_LEN = 32 bits mode, and the sequence of transmitted/received data will be BYTE0,
BYTE1, BYTE2, and then BYTE3. If the TX_BIT_LEN is set as 24-bits mode, the data in TX
buffer and RX buffer will be rearranged as [unknown byte, BYTE0, BYTE1, BYTE2] and the
BYTE0, BYTE1, and BYTE2 will be transmitted/received data step by step in MSB first. The rule
of 16-bits mode is the same as above.
NuMicro M051
Byte3
MSB first
Byte2
SPI_Tx0/SPI_Rx0
Byte1
Byte0
Figure 6.7-5 Byte Reorder
Series Technical Reference Manual
& REORDER = 2'b10/2'b01
LSB = 0 (MSB first)
- 236 -
Publication Release Date: Sep 14, 2010
Byte0
MSB first
nn
nn
Tx_BIT_LEN = 16 bits
Tx_BIT_LEN = 32 bits
Tx_BIT_LEN = 24 bits
nn = unknown byte
TX/RX Buffer
Byte1
Byte0
MSB first
nn
Byte2
Byte1
Byte0
MSB first
Revision V1.2
Byte3
Byte2
Byte1

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