M052LAN Nuvoton Technology Corporation of America, M052LAN Datasheet - Page 318

• Manufacturer Part Number: M052LAN
• Description: IC MCU 32BIT 8KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r

Specifications of M052LAN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.11.4.7 Input Sampling and A/D Conversion Time
6.11.4.8 Conversion Result Monitor by Compare Mode
An example timing diagram for continuous scan on enabled channels (0, 2, 3 and 7) is shown in
the Figure 6.11-6 .
A/D conversion can be triggered by external pin request. When the ADCR.TRGEN is set to high
to enable ADC external trigger function, setting the TRGS[1:0] bits to 00b is to select external
trigger input from the STADC pin. Software can set TRGCOND[1:0] to select trigger condition is
falling/rising edge or low/high level. An 8-bit sampling counter is used to deglitch. If level trigger
condition is selected, the STADC pin must be kept at defined state at least 8 PCLKs. The ADST
bit will be set to 1 at the 9
trigger input is pull at low (or high state) in level trigger mode. It is stopped only when external
condition trigger condition disappears. If edge trigger condition is selected, the high and low state
must be kept at least 4 PLCKs. Pulse that is shorter than this specification will be ignored.
NuMicro M051
monitor maximum two specified channels conversion result from A/D conversion module, refer to
Figure
CMPCH(ADCMPRx[5:0]) and CMPCOND bit is used to check conversion result is less than
specify value or greater than (equal to) value specified in CMPD[11:0]. When the conversion of
chsel[2:0]
sample
ADDR0
ADDR2
ADDR3
ADDR7
ADST
6.11-7.
NuMicro M051
Figure 6.11-6 Continuous Scan on Enabled Channels Timing Diagram
Continuous scan on channel 0, 2, 3 and 7 (ADCHER[7:0] = 0x10001101b)
™
series controller provide two sets of compare register ADCMPR0 and 1 to
Software
0x000 0x010 0x011 0x111 0x000 0x010 0x011 0x111 0x000
th
PCLK and start to conversion. Conversion is continuous if external
can
™
Series Technical Reference Manual
select
- 318 -
which
channel
Publication Release Date: Sep 14, 2010
Software clear ADST
to
be
monitored
Revision V1.2
by
set