ATTINY167-SU Atmel, ATTINY167-SU Datasheet - Page 10

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ATTINY167-SU

Manufacturer Part Number
ATTINY167-SU
Description
IC MCU AVR 16K FLASH 20SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY167-SU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (0.300", 7.50mm Width)
Core
AVR8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Notes:
10
0x1A (0x3A)
0x0E (0x2E)
0x0D (0x2D)
0x0C (0x2C)
0x0B (0x2B)
0x0A (0x2A)
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
Address
1. Address bits exceeding EEAMSB
2. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
3. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
4. Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
5. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
ATtiny87/ATtiny167
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such status flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATtiny87/167 is a com-
plex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN
and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD
instructions can be used.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PORTCR
PORTB
PORTA
Name
TIFR1
TIFR0
DDRB
DDRA
PINB
PINA
PORTB7
PORTA7
PINB7
PINA7
DDB7
DDA7
Bit 7
PORTB6
PORTA6
PINB6
PINA6
DDB6
DDA6
Bit 6
(Table 21-8 on page
PORTB5
PORTA5
PINB5
PINA5
BBMB
Bit 5
DDB5
DDA5
ICF1
PORTB4
PORTA4
BBMA
PINB4
PINA4
Bit 4
DDB4
DDA4
228) are don’t care.
PORTB3
PORTA3
PINB3
PINA3
DDB3
DDA3
Bit 3
PORTB2
PORTA2
OCF1B
PINB2
PINA2
DDB2
DDA2
Bit 2
PORTB1
PORTA1
OCF1A
OCF0A
PUDB
PINB1
PINA1
DDB1
DDA1
Bit 1
PORTB0
PORTA0
PINB0
PINA0
PUDA
DDB0
DDA0
Bit 0
TOV1
TOV0
8265BS–AVR–09/10
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