ATMEGA8-16AUR Atmel, ATMEGA8-16AUR Datasheet - Page 104
ATMEGA8-16AUR
Manufacturer Part Number
ATMEGA8-16AUR
Description
IC MCU AVR 8K 16MHZ 5V 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8-16AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA8-16AUR
Manufacturer:
AVX
Quantity:
4 000
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Counter Unit
104
ATmega8(L)
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
46
Figure 46. Counter Unit Block Diagram
Signal description (internal signals):
Depending on the mode of operation used, the counter is cleared, incremented, or decremented
at each timer clock (clk
selected by the clock select bits (CS22:0). When no clock source is selected (CS22:0 = 0) the
timer is stopped. However, the TCNT2 value can be accessed by the CPU, regardless of
whether clk
count operations.
The counting sequence is determined by the setting of the WGM21 and WGM20 bits located in
the Timer/Counter Control Register (TCCR2). There are close connections between how the
counter behaves (counts) and how waveforms are generated on the Output Compare Output
OC2. For more details about advanced counting sequences and waveform generation, see
“Modes of Operation” on page
The Timer/Counter Overflow (TOV2) Flag is set according to the mode of operation selected by
the WGM21:0 bits. TOV2 can be used for generating a CPU interrupt.
count
direction
clear
clk
TOP
BOTTOM
shows a block diagram of the counter and its surrounding environment.
T2
DATA BUS
T2
TCNTn
Increment or decrement TCNT2 by 1
Selects between increment and decrement
Clear TCNT2 (set all bits to zero)
Timer/Counter clock
Signalizes that TCNT2 has reached maximum value
Signalizes that TCNT2 has reached minimum value (zero)
is present or not. A CPU write overrides (has priority over) all counter clear or
T2
). clk
direction
count
BOTTOM
clear
108.
T2
can be generated from an external or internal clock source,
Control Logic
TOP
TOVn
(Int. Req.)
clk
Tn
Prescaler
Oscillator
T/C
clk
I/O
2486Z–AVR–02/11
TOSC2
TOSC1
Figure
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