ATMEGA8-16AUR Atmel, ATMEGA8-16AUR Datasheet - Page 227
![IC MCU AVR 8K 16MHZ 5V 32TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
ATMEGA8-16AUR
Manufacturer Part Number
ATMEGA8-16AUR
Description
IC MCU AVR 8K 16MHZ 5V 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8-16AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA8-16AUR
Manufacturer:
AVX
Quantity:
4 000
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Reading the Signature
Bytes
Reading the
Calibration Byte
Parallel Programming
Characteristics
2486Z–AVR–02/11
The algorithm for reading the Signature bytes is as follows (refer to
page 222
1. A: Load Command “0000 1000”
2. B: Load Address Low byte (0x00 - 0x02)
3. Set OE to “0”, and BS1 to “0”. The selected Signature byte can now be read at DATA.
4. Set OE to “1”
The algorithm for reading the Calibration bytes is as follows (refer to
page 222
1. A: Load Command “0000 1000”
2. B: Load Address Low byte, (0x00 - 0x03)
3. Set OE to “0”, and BS1 to “1”. The Calibration byte can now be read at DATA
4. Set OE to “1”
Figure 109. Parallel Programming Timing, Including some General Timing Requirements
Figure 110. Parallel Programming Timing, Loading Sequence with Timing Requirements
Note:
(DATA, XA0/1, BS1, BS2)
PAGEL
XTAL1
DATA
BS1
XA0
XA1
1. The timing requirements shown in
for details on Command and Address loading):
for details on Command and Address loading):
loading operation
Data & Contol
RDY/BSY
ADDR0 (Low Byte)
LOAD ADDRESS
PAGEL
XTAL1
(LOW BYTE)
WR
t
t
BVPH
DVXH
LOAD DATA
(LOW BYTE)
DATA (Low Byte)
t
t
XHXL
PHPL
Figure 109
t
t
t
t
t
XLXH
XLDX
PLBX
XLWL
PLWL
t
(that is, t
BVWL
(HIGH BYTE)
LOAD DATA
DATA (High Byte)
t
WL WH
t
XLPH
WLRL
DVXH
LOAD DATA
, t
“Programming the Flash” on
“Programming the Flash” on
XHXL
t
PLXH
t
, and t
ATmega8(L)
WLBX
LOAD ADDRESS
(LOW BYTE)
XLDX
ADDR1 (Low Byte)
) also apply to
t
WLRH
(1)
227
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