ATMEGA8-16AUR Atmel, ATMEGA8-16AUR Datasheet - Page 201
![IC MCU AVR 8K 16MHZ 5V 32TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
ATMEGA8-16AUR
Manufacturer Part Number
ATMEGA8-16AUR
Description
IC MCU AVR 8K 16MHZ 5V 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8-16AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA8-16AUR
Manufacturer:
AVX
Quantity:
4 000
- Current page: 201 of 302
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The ADC Data
Register – ADCL and
ADCH
ADLAR = 0
ADLAR = 1
2486Z–AVR–02/11
• Bits 2:0 – ADPS2:0: ADC Prescaler Select Bits
These bits determine the division factor between the XTAL frequency and the input clock to the
ADC.
Table 76. ADC Prescaler Selections
When an ADC conversion is complete, the result is found in these two registers.
When ADCL is read, the ADC Data Register is not updated until ADCH is read. Consequently, if
the result is left adjusted and no more than 8-bit precision is required, it is sufficient to read
ADCH. Otherwise, ADCL must be read first, then ADCH.
The ADLAR bit in ADMUX, and the MUXn bits in ADMUX affect the way the result is read from
the registers. If ADLAR is set, the result is left adjusted. If ADLAR is cleared (default), the result
is right adjusted.
• ADC9:0: ADC Conversion result
These bits represent the result from the conversion, as detailed in
page
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
ADPS2
199.
0
0
0
0
1
1
1
1
ADC7
ADC9
ADC1
15
15
R
R
R
R
–
7
0
0
7
0
0
ADC6
ADC8
ADC0
14
14
ADPS1
R
R
R
R
–
6
0
0
6
0
0
0
0
1
1
0
0
1
1
ADC5
ADC7
13
13
R
R
R
R
–
5
0
0
–
5
0
0
ADC4
ADC6
12
12
R
R
R
R
–
4
0
0
–
4
0
0
ADPS0
0
1
0
1
0
1
0
1
ADC3
ADC5
11
11
R
R
R
R
–
3
0
0
–
3
0
0
ADC2
ADC4
10
10
R
R
R
R
–
2
0
0
–
2
0
0
ADC9
ADC1
ADC3
Division Factor
R
R
R
R
9
1
0
0
9
–
1
0
0
“ADC Conversion Result” on
128
16
32
64
2
2
4
8
ADC8
ADC0
ADC2
ATmega8(L)
R
R
R
R
8
0
0
0
8
–
0
0
0
ADCH
ADCL
ADCH
ADCL
201
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