S9S08DN32F1MLH Freescale Semiconductor, S9S08DN32F1MLH Datasheet - Page 14

• Manufacturer Part Number: S9S08DN32F1MLH
• Description: IC MCU 8BIT 32KB FLASH 64LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of S9S08DN32F1MLH

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Processor Series: S08D
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08DZ60
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section Number
11.3 Register Definition .........................................................................................................................196
11.4 Functional Description ...................................................................................................................203
11.5 Resets .............................................................................................................................................208
11.6 Interrupts ........................................................................................................................................208
11.7 Initialization/Application Information ...........................................................................................210
12.1 Introduction ....................................................................................................................................213
12.2 External Signal Description ...........................................................................................................218
12.3 Modes of Operation........................................................................................................................219
12.4 Register Definition .........................................................................................................................219
12.5 Functional Description ...................................................................................................................224
14
11.3.1 IIC Address Register (IICA) ...........................................................................................197
11.3.2 IIC Frequency Divider Register (IICF) ...........................................................................197
11.3.3 IIC Control Register (IICC1) ..........................................................................................200
11.3.4 IIC Status Register (IICS) ...............................................................................................201
11.3.5 IIC Data I/O Register (IICD) ..........................................................................................202
11.3.6 IIC Control Register 2 (IICC2) .......................................................................................202
11.4.1 IIC Protocol .....................................................................................................................203
11.4.2 10-bit Address .................................................................................................................207
11.4.3 General Call Address ......................................................................................................208
11.6.1 Byte Transfer Interrupt ....................................................................................................208
11.6.2 Address Detect Interrupt .................................................................................................208
11.6.3 Arbitration Lost Interrupt ................................................................................................208
12.1.1 Features ...........................................................................................................................215
12.1.2 Block Diagrams ..............................................................................................................215
12.1.3 SPI Baud Rate Generation ..............................................................................................217
12.2.1 SPSCK — SPI Serial Clock ............................................................................................218
12.2.2 MOSI — Master Data Out, Slave Data In ......................................................................218
12.2.3 MISO — Master Data In, Slave Data Out ......................................................................218
12.2.4 SS — Slave Select ...........................................................................................................218
12.3.1 SPI in Stop Modes ..........................................................................................................219
12.4.1 SPI Control Register 1 (SPIC1) ......................................................................................219
12.4.2 SPI Control Register 2 (SPIC2) ......................................................................................220
12.4.3 SPI Baud Rate Register (SPIBR) ....................................................................................221
12.4.4 SPI Status Register (SPIS) ..............................................................................................222
12.4.5 SPI Data Register (SPID) ................................................................................................223
12.5.1 SPI Clock Formats ..........................................................................................................224
12.5.2 SPI Interrupts ..................................................................................................................227
12.5.3 Mode Fault Detection .....................................................................................................227
Serial Peripheral Interface (S08SPIV3)
MC9S08DN60 Series Data Sheet, Rev 3
Chapter 12
Title
Freescale Semiconductor
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