PK10N512VLK100 Freescale Semiconductor, PK10N512VLK100 Datasheet
PK10N512VLK100
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PK10N512VLK100 Summary of contents
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... Hardware CRC module to support fast cyclic redundancy checks – 128-bit unique identification (ID) number per chip This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. © 2010–2011 Freescale Semiconductor, Inc. Preliminary Document Number: K10P81M100SF2 Rev. 4, 3/2011 K10P81M100SF2 • ...
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... UART switching specifications..............................52 6.8.6 SDHC specifications.............................................52 6.8.7 I2S switching specifications..................................53 6.9 Human-machine interfaces (HMI)......................................55 6.9.1 TSI electrical specifications...................................55 7 Dimensions...............................................................................56 7.1 Obtaining package dimensions.........................................56 8 Pinout........................................................................................56 8.1 K10 Signal Multiplexing and Pin Assignments..................56 8.2 K10 Pinouts.......................................................................61 9 Revision History........................................................................62 Preliminary Freescale Semiconductor, Inc. ...
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... Field Q Qualification status K## Kinetis family M Flash memory type K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. http://www.freescale.com Description • Fully qualified, general market flow • Prequalification • K10 • Program flash only • Program flash and FlexMemory Table continues on the next page ...
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... MC = 121 MAPBGA ( mm) • 144 LQFP ( mm) • 144 MAPBGA ( mm) • 196 MAPBGA ( mm) • 256 MAPBGA ( mm) • MHz • MHz • 100 = 100 MHz • 120 = 120 MHz • 150 = 150 MHz • Tape and reel • (Blank) = Trays Preliminary Values Freescale Semiconductor, Inc. ...
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... Example This is an example of an attribute: Symbol Description CIN_D Input capacitance: digital pins K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Max. 0.9 1.1 Min. Max. 10 130 Min. ...
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... Result of exceeding a rating Measured characteristic K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 6 Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Preliminary Max. Unit V Freescale Semiconductor, Inc. ...
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... Typical values are provided as design guidelines and are neither tested nor guaranteed. 3.8.1 Example 1 This is an example of an operating behavior that includes a typical value: K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Normal Limited operating operating range ...
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... Ambient temperature A V 3.3 V supply voltage DD 4 Ratings K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 8 Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Preliminary Max. Unit 130 µ 150 °C 105 °C 25 °C –40 °C Unit °C V Freescale Semiconductor, Inc. ...
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... Description V Digital supply voltage DD I Digital supply current DD V Digital input voltage (except RESET, EXTAL, and XTAL) DIO K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. –55 — — Min. — Min. -2000 -500 -100 Table continues on the next page... ...
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... V — DD — 0.75 × — 0.35 × — 0.3 × 0.06 × V — –0.2 0 –5 1.2 — TBD — Preliminary Max. Unit 3.8 V Unit Notes Freescale Semiconductor, Inc. ...
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... Table 3. VBAT power operating requirements Symbol Description V Falling VBAT supply POR detect voltage POR_VBAT K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. , and induce an injection current when V SS supply LVD and POR operating requirements Min. TBD TBD TBD ...
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... OL — — — min and Vinput = min and Vinput = and VLLSx→RUN recovery times in the following table Preliminary Max. Unit Notes — V — V — V — V 100 mA 0.5 V 0.5 V 0.5 V 0.5 V 100 mA 1 μ μA 50 kΩ kΩ 3 Freescale Semiconductor, Inc. ...
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... I Analog supply current DDA I Run mode current — all peripheral clocks DD_RUN disabled, code executing from flash • @ 1.8V • @ 3.0V K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. — DD — — — — — — — ...
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... TBD — 35 TBD — 15 TBD — 0.4 TBD — 1.25 TBD — TBD TBD — 1.05 TBD — 50 TBD — 12 TBD — 8 TBD — 4 TBD — 2 TBD — 550 TBD Preliminary Unit Notes μA μA μA μA μ Freescale Semiconductor, Inc. ...
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... MCG in FEI mode (39.0625 kHz IRC), except for 1 MHz core (FBE) • All peripheral clocks enabled but peripherals are not in active operation • LVD disabled • No GPIOs toggled • Code execution from flash K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Preliminary General 15 ...
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... MHz (crystal OSC K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 16 Frequency Typ. band (MHz) 0.15–50 TBD 50–150 TBD 150–500 TBD 500–1000 TBD 0.15–1000 TBD = 96 MHz SYS Preliminary Unit Notes dBμ — Freescale Semiconductor, Inc. ...
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... System and core clock SYS f Bus clock BUS FB_CLK FlexBus clock f Flash clock FLASH K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Table 8. Capacitance attributes Min. Normal run mode — — — — VLPR mode — — — ...
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... K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 18 Min. Max. 1.5 — 100 — 16 — TBD — 2 — — 12 — 36 — 32 — 36 Min. –40 –40 Preliminary Unit Notes Bus clock 1 cycles Bus clock cycles Max. Unit 125 °C 105 °C Freescale Semiconductor, Inc. ...
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... Debug trace timing specifications Table 10. Debug trace operating behaviors Symbol Description T Clock period cyc T Low pulse width wl K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 81 MAPBGA TBD TBD TBD TBD TBD TBD TBD Frequency dependent Table continues on the next page ...
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... JTAG and CJTAG • Serial Wire Debug J2 TCLK cycle period K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011 Table continues on the next page... Preliminary Min. Max. Unit 2 — ns — — — — Min. Max. Unit 2.7 3.6 V MHz 1/J1 — ns Freescale Semiconductor, Inc. ...
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... TCLK low to boundary scan output data valid J8 TCLK low to boundary scan output high-Z J9 TMS, TDI input data setup time to TCLK rise K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table continues on the next page... Preliminary Min. Max. ...
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... Figure 6. Boundary scan (JTAG) timing K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011 Figure 5. Test clock input timing Preliminary Min. Max. Unit 1.4 — ns — 22.1 ns — 22.1 ns 100 — — Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...
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... J13 TRST 6.2 System modules There are no specifications necessary for the device's system modules. 6.3 Clock modules K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J11 J12 J11 Figure 7. Test Access Port timing J14 Figure 8 ...
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... TBD %f dco — 4 MHz — 5 MHz — µA TBD µs — — kHz — — kHz — 39.0625 kHz 25 MHz 2, 50 MHz 75 MHz 100 MHz Freescale Semiconductor, Inc ...
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... This specification applies to any time the PLL VCO divider or reference divider is changed, or changing from PLL disabled (BLPE, BLPI) to PLL enabled (PBE, PEE crystal/resonator is being used as the reference, this specification assumes it is already running. K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — ...
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... Table continues on the next page... Preliminary Max. Unit Notes 3 — nA — μA — μA — μA — mA — — μA — μA — μA — mA — mA — mA — — — MΩ — MΩ — MΩ — MΩ Freescale Semiconductor, Inc. ...
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... Input clock frequency (external clock mode) ec_extal t Input clock duty cycle (external clock mode) dc_extal K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — — — — — ...
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... Min. Typ. 1.71 — — 100 — 2.5 — 15 — 0.6 Min. Typ. Max. — 32 — — 1000 — Preliminary Unit Notes Max. Unit 3.6 V — MΩ — pF — pF — V Unit Notes kHz ms 1 Freescale Semiconductor, Inc. ...
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... Read 1s All Blocks execution time rd1all t Read Once execution time rdonce t Program Once execution time pgmonce K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — 20 — 20 — 160 Min. Typ. ...
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... Table continues on the next page... Preliminary Max. Unit Notes 1600 μs 1 Typ. Unit 10 mA Max. Unit Notes 1 — years 2 — years 2 — years 2 — cycles 3 Min. Max. Unit 2.7 3.6 V — MHz SYS — MHz SYS — ns EZP_CK 5 — — ns Freescale Semiconductor, Inc. ...
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... Flexbus output clock (FB_CLK). All other timing relationships can be derived from these values. Table 23. Flexbus switching specifications Num Description Operating voltage Frequency of operation K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors EP3 EP2 EP4 EP9 EP7 EP8 ...
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... Figure 10. FlexBus read timing diagram K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 32 (continued) Min. 20 TBD 0 8.5 0.5 FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Preliminary Max. Unit Notes — — — — Freescale Semiconductor, Inc. ...
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... Figure 11. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 Address Data ...
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... Table continues on the next page... Preliminary are achievable on the Table 26 and Max. Unit Notes 3.6 V +100 mV 2 +100 DDA V V SSA V V REFH kΩ kΩ 4 18.0 MHz 5 12.0 MHz Freescale Semiconductor, Inc. ...
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... For guidelines and examples of conversion rate calculation please download the ADC calculator tool http:// cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1 7. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http:// cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1 K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Max. ...
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... CHANNEL SELECT CIRCUIT ADC SAR ENGINE R ADIN R ADIN R ADIN R ADIN C ADIN , REFL SSA 2 Max. Unit Notes 1 — MHz ADACK f ADACK — MHz — MHz — MHz ±TBD ADC 4 LSB conversion ±1 clock <12MHz, Max hardware averaging (AVGE = %1, AVGS = %11) Freescale Semiconductor, Inc. ...
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... Avg=32 SFDR Spurious free 16 bit differential mode dynamic range • Avg=32 16 bit single-ended mode • Avg=32 K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = REFH DDA REFL 1 Min. Typ. ...
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... VREFOUT VREFOUT VREFOUT V — SSA V — SSA Table continues on the next page... Preliminary = V ) (continued) SSA 2 Max. Unit Notes leakage current (refer to the MCU's voltage and current operating ratings) — mV/°C — mV/°C — mV Max. Unit Notes 3 DDA V V DDA Freescale Semiconductor, Inc. ...
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... PGAG=5 • PGAG=6 BW Input signal • 16-bit modes bandwidth • < 16-bit modes PSRR Power supply Gain=1 rejection ration K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. — 128 — 64 — 32 — ...
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... DDA to 3.6V TBD %/ leakage AS In current (refer to the MCU's voltage and current operating ratings × 0.583 — dB 16-bit differential — dB mode, Average=32 — dB 16-bit differential — dB mode, Average=32, f =500Hz in — dB 16-bit differential — dB mode, Average=32, f =500Hz in Freescale Semiconductor, Inc. ...
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... I Supply current, low-speed mode (EN=1, PMODE=0) DDLS V Analog input voltage AIN V Analog input offset voltage AIO K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. TBD 12.3 TBD 12.7 TBD 8.4 TBD 8 ...
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... V – 0.5 DD — 20 120 — 2 — –0.5 –0.3 -0.6V. DD Preliminary Typ. Max. Unit 5 — — — — mV — — V — 0 200 ns 250 600 ns — TBD ns 7 — μA — 0.5 3 LSB — 0.3 LSB Freescale Semiconductor, Inc. ...
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... Figure 15. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) Preliminary HYSTCTR S etting 00 ...
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... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 −40 — — Preliminary HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 105 °C 100 Freescale Semiconductor, Inc. ...
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... LP 1. Settling within ±1 LSB 2. The INL is measured for 0+100mV The DNL is measured for 0+100 The DNL is measured for 0+100mV to V K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — — ...
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... Peripheral operating requirements and behaviors 5. Calculated by a best fit curve from V Figure 17. Typical INL error vs. digital code K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 46 +100 mV to VREF−100 mV SS Preliminary Freescale Semiconductor, Inc. ...
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... Table 32. VREF full-range operating behaviors Symbol Description V Voltage reference output with factory trim at out nominal V and temperature=25C DDA K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 −40 — Min. Typ. TBD 1.2 Table continues on the next page ...
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... Typ. Max. Unit Notes — TBD V — 1.202 V 0.5 — mV — See Figure 19 — TBD ppm/year — TBD µA — 1.1 mA — TBD V — 100 µs — TBD mV — TBD dB Max. Unit Notes 50 °C Max. Unit Notes TBD V Freescale Semiconductor, Inc. ...
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... DSPI_PCSn DS3 DSPI_SCK DS7 (CPOL=0) DSPI_SIN DSPI_SOUT Figure 21. DSPI classic SPI timing — master mode K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 — BCLK (t / SCK ...
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... Table continues on the next page... Preliminary Min. Max. Unit 1.71 3.6 V — 6.25 MHz — ns BCLK (t / SCK SCK/2) — — — — ns — — DS9 DS16 DS11 Last data Last data Min. Max. Unit 2.7 3.6 V — 25 MHz Freescale Semiconductor, Inc. ...
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... DSPI_SIN to DSPI_SCK input setup DS14 DSPI_SCK to DSIP_SIN input hold DS15 DSPI_SS active to DSPI_SOUT driven DS16 DSPI_SS inactive to DSPI_SOUT not driven K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description DS1 DS2 DS8 Data Last data ...
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... First data Data DS14 First data Data Card input clock Table continues on the next page... Preliminary DS9 DS16 DS11 Last data Last data Min. Max. Unit 2.7 3 400 kHz 0 25 MHz 0 20 MHz 0 400 kHz 7 — — ns — Freescale Semiconductor, Inc. ...
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... Table 40. I Num Description Operating voltage S1 I2S_MCLK cycle time K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors (continued) SD3 SD2 SD1 SD6 SD7 SD8 Figure 25 ...
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... Table continues on the next page... Preliminary Min. Max. Unit 45% 55% MCLK period — ns SYS 45% 55% BCLK period — -2.5 — ns — — — — S10 S8 Min. Max. Unit 2.7 3 — ns SYS 45% 55% MCLK period 10 — — ns — — — ns Freescale Semiconductor, Inc. ...
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... ELE Pres5 Electrode capacitance measurement precision Pres20 Electrode capacitance measurement precision Pres100 Electrode capacitance measurement precision K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 2 S slave mode timing (continued) S11 S12 S15 S16 ...
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... TBD — μA, REFCHRG = 4 128, REF http://www.freescale.com and perform a keyword Then use this document number 98ASS23174W 98ASA10631D Preliminary Max. Unit Notes — fF/count 6 — fF/count 7 16 bits 25 μs 8 — μA TBD μA Freescale Semiconductor, Inc. ...
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... VDDA VDDA VDDA • 18 VREFH VREFH VREFH • 19 VREFL VREFL VREFL K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. NOTE ALT1 ALT2 ALT3 ALT4 PTE0 SPI1_PCS1 UART1_TX SDHC0_D1 PTE1 SPI1_SOUT UART1_RX SDHC0_D0 PTE2 SPI1_SCK UART1_CT SDHC0_DC S_b ...
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... FTM0_FLT2 FTM_CLKIN 0 PTA19 FTM1_FLT0 FTM_CLKIN 1 Preliminary ALT5 ALT6 ALT7 EzPort JTAG_TCL EZP_CLK K/ SWD_CLK JTAG_TDI EZP_DI JTAG_TDO/ EZP_DO TRACE_SW O JTAG_TMS/ SWD_DIO NMI_b EZP_CS_b CMP2_OUT I2S0_RX_B JTAG_TRS CLK T I2S0_TXD FTM1_QD_ PHA I2S0_TX_F FTM1_QD_ S PHB I2S0_TX_B CLK I2S0_RXD I2S0_RX_F S I2S0_MCLK I2S0_CLKIN LPT0_ALT1 Freescale Semiconductor, Inc. ...
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... VSS VSS VSS • 60 VDD VDD VDD • 61 PTC4 • 62 PTC5 K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTB0 I2C0_SCL FTM1_CH0 PTB1 I2C0_SDA FTM1_CH1 PTB2 I2C0_SCL UART0_RT S_b PTB3 I2C0_SDA UART0_CT ...
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... SPI0_PCS3 UART0_RX FTM0_CH6 PTD7 CMT_IRO UART0_TX FTM0_CH7 Preliminary ALT5 ALT6 ALT7 EzPort FB_AD9 FB_AD8 FB_AD6 FTM2_FLT0 FB_AD5 FB_RW_b FB_CS5_b/ FB_TSIZ1/ FB_BE23_1 6_BLS15_8 _b FB_CS4_b/ FB_TSIZ0/ FB_BE31_2 4_BLS7_0_ b FB_ALE/ FB_CS1_b/ FB_TS_b FB_CS0_b FB_AD4 FB_AD3 FB_AD2 EWM_IN FB_AD1 EWM_OUT _b FB_AD0 FTM0_FLT0 FTM0_FLT1 Freescale Semiconductor, Inc. ...
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... The below figure shows the pinout diagram for the devices supported by this document. Many signals may be multiplexed onto a single pin. To determine what signals can be used on which pin, see the previous section. The 81 MAPBGA ballmap assignments are currently being developed. K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. NOTE Preliminary Pinout 61 ...
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... The following table provides a revision history for this document. K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 62 Preliminary 60 VDD 59 VSS 58 PTC3 57 PTC2 56 PTC1 55 PTC0 54 PTB19 53 PTB18 52 PTB17 51 PTB16 50 VDD 49 VSS 48 PTB11 47 PTB10 46 PTB3 45 PTB2 44 PTB1 43 PTB0 42 RESET_b 41 PTA19 Freescale Semiconductor, Inc. ...
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... K10 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Table 43. Revision History Substantial Changes Initial public revision Many updates throughout Corrected 81- and 104-pin package codes Added sections that were inadvertently removed in previous revision Reworded I footnote in "Voltage and Current Operating Requirements" ...
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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...