PK30X256VMD100 Freescale Semiconductor, PK30X256VMD100 Datasheet

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PK30X256VMD100

Manufacturer Part Number
PK30X256VMD100
Description
IC ARM CORTEX MCU 256K 144-MAP
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Datasheets

Specifications of PK30X256VMD100

Core Processor
ARM Cortex-M4
Core Size
32-Bit
Speed
100MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SDHC, SPI, UART/USART
Peripherals
DMA, I²S, LCD, LVD, POR, PWM, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 37x16b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LBGA
Rohs Compliant
Yes
Processor Series
Kinetis
Core
ARM Cortex M4
Data Ram Size
64 KB
Interface Type
UART, SPI, I2C, I2S, CAN
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
102
Operating Supply Voltage
1.71 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PK30X256VMD100
Manufacturer:
FSL
Quantity:
10
Part Number:
PK30X256VMD100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
Data Sheet: Advance Information
K30 Sub-Family Data Sheet
Supports the following:
MK30DN512ZVMC10
Features
• Operating Characteristics
• Performance
• Memories and memory interfaces
• Clocks
• System peripherals
• Security and integrity modules
This document contains information on a new product. Specifications and
information herein are subject to change without notice.
© 2010–2011 Freescale Semiconductor, Inc.
Preliminary
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
– Up to 100 MHz ARM Cortex-M4 core with DSP
– Up to 512 KB program flash memory on non-
– Up to 256 KB program flash memory on
– Up to 256 KB FlexNVM on FlexMemory devices
– 4 KB FlexRAM on FlexMemory devices
– Up to 128 KB RAM
– Serial programming interface (EzPort)
– 3 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
– 10 low-power modes to provide power optimization
– Memory protection unit with multi-master
– 16-channel DMA controller, supporting up to 64
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
– Hardware CRC module to support fast cyclic
– 128-bit unique identification (ID) number per chip
instructions delivering 1.25 Dhrystone MIPS per
MHz
FlexMemory devices
FlexMemory devices
based on application requirements
protection
request sources
redundancy checks
• Human-machine interface
• Analog modules
• Timers
• Communication interfaces
– Segment LCD controller supporting up to 40
– Low-power hardware touch sensor interface (TSI)
– General-purpose input/output
– Two 16-bit SAR ADCs
– Programmable gain amplifier (PGA) (up to x64)
– Two 12-bit DACs
– Three analog comparators (CMP) containing a 6-bit
– Voltage reference
– Programmable delay block
– Eight-channel motor control/general purpose/PWM
– Two 2-channel quadrature decoder/general purpose
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
– Two Controller Area Network (CAN) modules
– Three SPI modules
– Two I2C modules
– Six UART modules
– Secure Digital host controller (SDHC)
– I2S module
frontplanes and 8 backplanes, or 44 frontplanes and
4 backplanes
integrated into each ADC
DAC and programmable reference input
timer
timers
K30P121M100SF2
Document Number: K30P121M100SF2
Rev. 5, 5/2011

Related parts for PK30X256VMD100

PK30X256VMD100 Summary of contents

Page 1

... Hardware CRC module to support fast cyclic redundancy checks – 128-bit unique identification (ID) number per chip This document contains information on a new product. Specifications and information herein are subject to change without notice. © 2010–2011 Freescale Semiconductor, Inc. Preliminary Document Number: K30P121M100SF2 Rev. 5, 5/2011 K30P121M100SF2 • ...

Page 2

... I2S switching specifications..................................55 6.9 Human-machine interfaces (HMI)......................................57 6.9.1 TSI electrical specifications...................................57 6.9.2 LCD electrical characteristics................................58 7 Dimensions...............................................................................59 7.1 Obtaining package dimensions.........................................59 8 Pinout........................................................................................60 8.1 K30 Signal Multiplexing and Pin Assignments..................60 8.2 K30 Pinouts.......................................................................65 9 Revision History........................................................................66 Preliminary Freescale Semiconductor, Inc. ...

Page 3

... Qualification status K## Kinetis family A Key attribute M Flash memory type K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. http://www.freescale.com Description • Fully qualified, general market flow • Prequalification • K30 • Cortex-M4 w/ DSP • Cortex-M4 w/ DSP and FPU • ...

Page 4

... LL = 100 LQFP ( mm) • 121 MAPBGA ( mm) • 144 LQFP ( mm) • 144 MAPBGA ( mm) • 196 MAPBGA ( mm) • 256 MAPBGA ( mm) • MHz • MHz • 100 MHz • 120 MHz • 150 MHz • Tape and reel • (Blank) = Trays Preliminary Values Freescale Semiconductor, Inc. ...

Page 5

... WP pulldown current 3.3 Definition: Attribute An attribute is a specified value or range of values for a technical characteristic that are guaranteed, regardless of whether you meet the operating requirements. K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Max. 0.9 1.1 Min. Max. ...

Page 6

... Measured characteristic K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 6 Min. — 7 Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Preliminary Max. Unit pF Max. Unit V Freescale Semiconductor, Inc. ...

Page 7

... Typical values are provided as design guidelines and are neither tested nor guaranteed. 3.8.1 Example 1 This is an example of an operating behavior that includes a typical value: K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Normal Limited operating operating range ...

Page 8

... Ambient temperature A V 3.3 V supply voltage DD 4 Ratings K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 8 Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Preliminary Max. Unit 130 µ 150 °C 105 °C 25 °C –40 °C Unit °C V Freescale Semiconductor, Inc. ...

Page 9

... Description V Digital supply voltage DD I Digital supply current DD V Digital input voltage (except RESET, EXTAL, and XTAL) DIO K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. –55 — — Min. — Min. -2000 -500 -100 Table continues on the next page... ...

Page 10

... V DD — — 0.06 × — Table continues on the next page... Preliminary Min. Max. Unit –0 0 – – –0.3 3.8 V Max. Unit Notes 3.6 V 3.6 V 0.1 V 0.1 V 3.6 V — V — V 0.35 × 0.3 × — — — +5 Freescale Semiconductor, Inc. ...

Page 11

... V LVW2L • Level 3 falling (LVWV=10) V LVW3L • Level 4 falling (LVWV=11) V LVW4L K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. -25 — 1.2 TBD through a ESD protection diode. There is no diode SS (=V -0.3V) is observed, then there is no need to provide current limiting ...

Page 12

... Table continues on the next page... Preliminary Max. Unit Notes mV TBD V TBD μs Max. Unit Notes TBD V Max. Unit Notes — V — V — V — V 100 mA 0.5 V 0.5 V 0.5 V 0.5 V 100 mA 1 μA 1 TBD μ μA 50 kΩ 2 Freescale Semiconductor, Inc. ...

Page 13

... RUN → LLS → RUN • RUN → LLS • LLS → RUN RUN → STOP → RUN • RUN → STOP • STOP → RUN K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. 20 min and Vinput = min and Vinput = V ...

Page 14

... TBD — 1.25 Table continues on the next page... Preliminary Max. Unit Notes 4.1 μs 5.8 μs Max. Unit Notes TBD TBD mA TBD mA 3 TBD mA TBD mA 4 TBD mA TBD mA TBD mA TBD mA 2 TBD mA 5 TBD mA TBD mA TBD mA TBD mA 6 Freescale Semiconductor, Inc. ...

Page 15

... MCG configured for FEI mode MHz core, system, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks disabled. Code executing from flash. K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Typ. Max. ...

Page 16

... Figure 1. Run mode supply current vs. core frequency — all peripheral clocks disabled The following data was measured under these conditions: • MCG in FEI mode (39.0625 kHz IRC), except for 1 MHz core (FBE) K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 16 Preliminary Freescale Semiconductor, Inc. ...

Page 17

... RE2 V Radiated emissions voltage, band 3 RE3 V Radiated emissions voltage, band 4 RE4 V IEC and SAE level RE_IEC_SAE K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Frequency Typ. band (MHz) 0.15–50 TBD 50–150 TBD 150–500 TBD 500–1000 TBD 0.15– ...

Page 18

... K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011 MHz SYS Table 8. Capacitance attributes Min. Normal run mode — — — — VLPR mode — Table continues on the next page... Preliminary Min. Max. Unit — — Max. Unit Notes 100 MHz 50 MHz 25 MHz 25 MHz 2 MHz Freescale Semiconductor, Inc. ...

Page 19

... DD • 2.7 ≤ V ≤ 3.6V DD • Slew enabled • 1.71 ≤ V ≤ 2.7V DD • 2.7 ≤ V ≤ 3.6V DD K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Max. — 2 — 1 — 25 Min. Max. 1.5 — 100 — ...

Page 20

... Thermal TBD resistance, junction to board Thermal TBD resistance, junction to case Table continues on the next page... Preliminary Min. Max. Unit –40 125 °C –40 °C Unit Notes °C/W 1 °C/W 1 °C/W 1 °C/W 1 °C/W 2 °C/W 3 Freescale Semiconductor, Inc. ...

Page 21

... High pulse width wh T Clock and data rise time r T Clock and data fall time f K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description 121 MAPBGA Thermal TBD characterization parameter, junction to package top ...

Page 22

... Boundary scan input data hold time after TCLK rise K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011 Table continues on the next page... Preliminary Min. Max. Unit 3 — — Min. Max. Unit 2.7 3.6 V MHz 1/J1 — — — — ns — — — ns Freescale Semiconductor, Inc. ...

Page 23

... TCLK low to TDO data valid J12 TCLK low to TDO high-Z J13 TRST assert time J14 TRST setup time (negation) to TCLK high K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — — ...

Page 24

... TCLK (input) TCLK Data inputs Data outputs Data outputs Data outputs Figure 6. Boundary scan (JTAG) timing K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011 Figure 5. Test clock input timing Preliminary Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...

Page 25

... J13 TRST 6.2 System modules There are no specifications necessary for the device's system modules. 6.3 Clock modules K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J11 J12 J11 Figure 7. Test Access Port timing J14 Figure 8 ...

Page 26

... TBD %f dco — 4 MHz — 5 MHz — µA TBD µs — — kHz — — kHz — 39.0625 kHz 25 MHz 3, 50 MHz 75 MHz 100 MHz Freescale Semiconductor, Inc ...

Page 27

... The resulting system clock frequencies should not exceed their maximum specified values. The DCO frequency deviation (Δf ) over voltage and temperature should be considered. dco_t K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — 23.99 732 × ...

Page 28

... Table continues on the next page... Preliminary Max. Unit Notes 3 — nA — μA — μA — μA — mA — — μA — μA — μA — mA — mA — mA — — Freescale Semiconductor, Inc. ...

Page 29

... Oscillator frequency specifications Table 17. Oscillator frequency specifications Symbol Description f Oscillator crystal or resonator frequency — low osc_lo frequency mode (MCG_C2[RANGE]=00) K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — — — — — ...

Page 30

... Min. Typ. 1.71 — — 100 — 2.5 — 15 — 0.6 Preliminary Unit Notes MHz MHz MHz Max. Unit 3.6 V — MΩ — pF — pF — V Freescale Semiconductor, Inc. ...

Page 31

... Program Check execution time pgmchk t Read Resource execution time rdrsrc t Program Longword execution time pgm4 K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — 32.768 — 1000 Min. Typ. — ...

Page 32

... TBD μs 320 1600 ms — 35 μs TBD TBD μs TBD TBD μs TBD TBD μs TBD TBD μs 175 TBD ms TBD TBD ms TBD TBD ms 100 TBD μs TBD TBD ms TBD 1.5 ms TBD TBD ms TBD 2.5 ms 100 TBD μs Freescale Semiconductor, Inc ...

Page 33

... Data retention after cycles nvmretd10k t Data retention after cycles nvmretd1k t Data retention after up to 100 cycles nvmretd100 K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — TBD — TBD — TBD — ...

Page 34

... Max. Unit Notes 1 Typ. TBD — cycles TBD — years TBD — years TBD — years TBD — writes TBD — writes TBD — writes TBD — writes TBD — writes ≤ 125°C. j × Write_efficiency × n nvmcycd Freescale Semiconductor, Inc ...

Page 35

... FlexRAM • 0.50 for 16-bit or 32-bit writes to FlexRAM • n — data flash cycling endurance nvmcycd Figure 9. EEPROM backup writes to FlexRAM K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Preliminary 35 ...

Page 36

... K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 36 EP3 EP2 EP4 EP9 EP7 EP8 EP5 EP6 Figure 10. EzPort Timing Diagram Preliminary Min. Max. Unit 1.71 3.6 V — MHz SYS — MHz SYS — ns EZP_CK 5 — — — — ns — — ns — Freescale Semiconductor, Inc. ...

Page 37

... ADCK f ADC conversion ≤ 13 bit modes ADCK clock frequency f ADC conversion 16 bit modes ADCK clock frequency K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table 25 and Table 26 Min. 1 Typ. 1.71 — -100 ...

Page 38

... K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 38 Min. 1 Max. Typ. 20.000 — 818.330 37.037 — 461.467 = 1.0 MHz unless otherwise stated. Typical values are for ADCK ADIN ADIN Preliminary Unit Notes 6 Ksps 7 Ksps / AS ADIN ADIN ADIN ADIN ADIN Freescale Semiconductor, Inc. ...

Page 39

... ENOB Effective number 16 bit differential mode of bits • Avg=32 • Avg=1 16 bit single-ended mode • Avg=32 • Avg=1 K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = V REFH DDA 1 Min. Typ. 0.215 — 1.2 2 ...

Page 40

... REFH DDA = 2.0 MHz unless otherwise stated. Typical values are for ADCK modes Preliminary = V ) (continued) SSA 2 Max. Unit Notes dB 5 TBD dB TBD dB 5 — dB — leakage current (refer to the MCU's voltage and current operating ratings) — mV/°C — mV Freescale Semiconductor, Inc. ...

Page 41

... Recommended ADC setting is: ADLSMP=1, ADLSTS MHz ADC clock. 7. ADC clock = 18 MHz, ADLSMP = 1, ADLST = 00, ADHSC = 1 8. ADC clock = 12 MHz, ADLSMP = 1, ADLST = 01, ADHSC = 1 K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Max. Typ. ...

Page 42

... DDA ±100mV 50Hz, VDDA 60Hz — 500mVpp, — 50Hz, VCM 100Hz TBD mV Output offset = V *(Gain+1) OFS 10 µs 5 TBD ppm/° 50°C TBD ppm/°C TBD ppm/° 50°C, ADC Averaging=32 TBD %/V V from 1.71 DDA to 3.6V TBD %/V Freescale Semiconductor, Inc. ...

Page 43

... Between IN+ and IN-. The PGA draws a DC current from the input terminals. The magnitude of the DC current is a strong function of input common mode voltage (V 4. Gain = 2 PGAG 5. After changing the PGA gain setting, a minimum of 2 ADC+PGA conversions should be ignored. K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. I × ...

Page 44

... DD Preliminary Typ. Max. Unit — 3.6 V — 200 μA — 20 μA — — — — — — mV — — V — 0 200 ns 250 600 ns — 40 μs 7 — μA — 0.5 3 LSB — 0.3 LSB Freescale Semiconductor, Inc. ...

Page 45

... Figure 14. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) Preliminary HYSTCTR S etting 00 ...

Page 46

... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 −40 — — Preliminary HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 105 °C 100 Freescale Semiconductor, Inc. ...

Page 47

... The INL is measured for 0+100mV The DNL is measured for 0+100 The DNL is measured for 0+100mV Calculated by a best fit curve from V K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — — ...

Page 48

... Peripheral operating requirements and behaviors 6. VDDA = 3.0V, reference select set for VDDA (DACx_CO:DACRFS = 1), high power mode(DACx_C0:LPEN = 0), DAC set to 0x800, Temp range from -40C to 105C Figure 16. Typical INL error vs. digital code K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 48 Preliminary Freescale Semiconductor, Inc. ...

Page 49

... Table 33. VREF full-range operating behaviors Symbol Description V Voltage reference output with factory trim at out nominal V and temperature=25C DDA K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 −40 — Min. Typ. TBD 1.2 Table continues on the next page ...

Page 50

... Max. Unit Notes — TBD V — 1.202 V 0.5 — mV — See Figure 18 — TBD ppm/year — TBD µA — 1 — TBD — TBD — 100 µs — TBD mV — TBD dB Max. Unit Notes 50 °C Max. Unit Notes TBD V Freescale Semiconductor, Inc. 1 ...

Page 51

... The DSPI module can operate across the entire operating voltage for the processor, but to run across the full voltage range the maximum frequency of operation is reduced. 2. The delay is programmable in SPIx_CTARn[PSSCK] and SPIx_CTARn[CSSCK]. 3. The delay is programmable in SPIx_CTARn[PASC] and SPIx_CTARn[ASC]. K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. 1.71 3.6 — ...

Page 52

... Description DS10 DS15 DS12 First data Data DS14 First data Data Preliminary DS4 Min. Max. Unit 1.71 3.6 V — 6.25 MHz — ns BUS (t / SCK SCK/2) — — — — ns — — DS9 DS16 DS11 Last data Last data Freescale Semiconductor, Inc. ...

Page 53

... DSPI_SOUT Figure 22. DSPI classic SPI timing — master mode Table 39. Slave mode DSPI timing (high-speed mode) Num Operating voltage Frequency of operation K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 2.7 — BUS (t /2) − ...

Page 54

... K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 54 Description DS10 DS15 DS12 First data Data DS14 First data Data Preliminary Min. Max. Unit — ns BUS (t /2) − SCK SCK — — — — ns — — DS9 DS16 DS11 Last data Last data Freescale Semiconductor, Inc. ...

Page 55

... SDHC input hold time IH SDHC_CLK Output SDHC_CMD Output SDHC_DAT[3:0] Input SDHC_CMD Input SDHC_DAT[3:0] K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Card input clock SD3 SD2 SD1 SD6 SD7 SD8 Figure 24. SDHC timing Preliminary Min ...

Page 56

... S in master (clocks driven) and slave 2 S master mode timing S10 2 S timing — master mode Preliminary Min. Max. Unit 2.7 3 SYS 45% 55% MCLK period — ns SYS 45% 55% BCLK period — -2.5 — ns — — — — S10 S8 Freescale Semiconductor, Inc. ...

Page 57

... DDTSI C Target electrode capacitance range ELE f Reference oscillator frequency REFmax f Electrode oscillator frequency ELEmax K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table 42 slave mode timing S11 S12 S15 S16 S18 2 S timing — slave modes Min ...

Page 58

... Table continues on the next page... Preliminary Max. Unit Notes TBD pF TBD mV 4 TBD μ TBD μ TBD % 6 TBD % 7 TBD % 8 — fF/count 9 — fF/count 10 16 bits 25 μs 11 — μA TBD μ μA, REFCHRG = 4 128, Max. Unit Notes 58 Hz — — 8000 pF 2 Freescale Semiconductor, Inc. ...

Page 59

... V IREG 4. 2000 pF load LCD frame frequency 7 Dimensions 7.1 Obtaining package dimensions Package dimensions are provided in package drawings. K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Typ. Max. 0.89 1.00 1.15 1 ...

Page 60

... D PTE4 SPI1_PCS0 UART3_TX SDHC0_D3 PTE5 SPI1_PCS2 UART3_RX SDHC0_D2 PTE6 SPI1_PCS3 UART3_CTS I2S0_MCLK _b SPI0_PCS0 UART2_TX FTM_CLKIN 0 SPI0_SCK UART2_RX FTM_CLKIN 1 SPI0_SOUT UART2_CTS I2C0_SDA _b SPI0_SIN UART2_RTS I2C0_SCL _b Preliminary and perform a keyword ALT5 ALT6 ALT7 EzPort I2C1_SDA I2C1_SCL I2S0_CLKIN FTM0_FLT3 LPT0_ALT3 Freescale Semiconductor, Inc. ...

Page 61

... PTE25 ADC0_SE18 ADC0_SE18 PTE25 H6 PTE26 DISABLED J6 PTA0 JTAG_TCLK/ TSI0_CH1 SWD_CLK/ EZP_CLK H8 PTA1 JTAG_TDI/ TSI0_CH2 EZP_DI K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 CAN1_TX UART4_TX CAN1_RX UART4_RX PTE26 UART4_CTS _b PTA0 UART0_CTS FTM0_CH5 _b PTA1 UART0_RX ...

Page 62

... FTM1_CH1 PTB2 I2C0_SCL UART0_RTS _b Preliminary ALT5 ALT6 ALT7 EzPort JTAG_TDO/ EZP_DO TRACE_SW O JTAG_TMS/ SWD_DIO NMI_b EZP_CS_b CMP2_OUT I2S0_RX_BC JTAG_TRST LK FTM2_QD_P TRACE_D0 HA FTM2_QD_P HB I2S0_TXD FTM1_QD_P HA I2S0_TX_FS FTM1_QD_P HB I2S0_TX_BC LK I2S0_RXD I2S0_RX_FS I2S0_MCLK I2S0_CLKIN LPT0_ALT1 FTM1_QD_P LCD_P0 HA FTM1_QD_P LCD_P1 HB FTM0_FLT3 LCD_P2 Freescale Semiconductor, Inc. ...

Page 63

... VLL1 VLL1 B11 VCAP2 VCAP2 VCAP2 C11 VCAP1 VCAP1 VCAP1 A8 PTC4 LCD_P24 LCD_P24 D7 PTC5 LCD_P25 LCD_P25 K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTB3 I2C0_SDA UART0_CTS _b PTB6 PTB7 PTB8 UART3_RTS _b PTB9 SPI1_PCS1 UART3_CTS ...

Page 64

... PTD12 SPI2_SCK SDHC0_D4 PTD13 SPI2_SOUT SDHC0_D5 Preliminary ALT5 ALT6 ALT7 EzPort LCD_P26 LCD_P27 LCD_P28 FTM2_FLT0 LCD_P29 LCD_P30 LCD_P31 LCD_P32 LCD_P33 LCD_P34 LCD_P35 LCD_P36 LCD_P37 LCD_P38 LCD_P39 LCD_P40 LCD_P41 LCD_P42 LCD_P43 EWM_IN LCD_P44 EWM_OUT_ LCD_P45 b FTM0_FLT0 LCD_P46 FTM0_FLT1 LCD_P47 Freescale Semiconductor, Inc. ...

Page 65

... The below figure shows the pinout diagram for the devices supported by this document. Many signals may be multiplexed onto a single pin. To determine what signals can be used on which pin, see the previous section. K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ...

Page 66

... VLL2 VLL3 B PTC3 PTC0 PTB16 VCAP2 C PTC2 PTB19 PTB11 VCAP1 D PTC1 PTB18 PTB10 PTB8 E PTB17 PTB9 PTB7 F PTB21 PTB20 PTB6 G PTB3 PTB2 PTB1 PTB0 H PTA1 PTA3 PTA17 PTA29 J PTA4 PTA10 PTA16 RESET_b K PTA14 VSS PTA19 L PTA15 VDD PTA18 Freescale Semiconductor, Inc. ...

Page 67

... Changed Reference oscillator current source base current spec and added Low- power current adder footer in "TSI electrical specifications" table • Added LCD glass capacitance footnote K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. footnote in "Voltage and Current Operating Requirements" table. IC spec in "Power consumption operating behaviors" table ...

Page 68

... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...

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