MCIMX27MOP4A Freescale Semiconductor, MCIMX27MOP4A Datasheet - Page 59

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MCIMX27MOP4A

Manufacturer Part Number
MCIMX27MOP4A
Description
IC MPU I.MX27 19X19 473MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX27r
Datasheets

Specifications of MCIMX27MOP4A

Core Processor
ARM9
Core Size
32-Bit
Speed
400MHz
Connectivity
1-Wire, CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, LCD, POR, PWM, WDT
Program Memory Type
ROMless
Ram Size
45K x 8
Voltage - Supply (vcc/vdd)
1.38 V ~ 1.52 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
473-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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4.3.2.3
Figure 19
4.3.2.4
The FEC functions correctly with a maximum MDC frequency of 2.5 MHz. The MDC frequency should
be equal to or less than 2.5 MHz to be compliant with IEEE 802.3 MII specification. However the FEC
can function correctly with a maximum MDC frequency of 15 MHz.
Figure 20
Freescale Semiconductor
1
M9
Note:
FEC_COL has the same timing in 10 Mbit 7-wire interface mode.
1
ID
FEC_MDIO (output)
FEC_MDC (output)
FEC_MDIO (input)
shows the MII asynchronous input timings, and
shows the MII serial management channel timings, and
FEC_CRS to FEC_COL minimum pulse width
FEC_CRS, FEC_COL
MII Asynchronous Inputs Signal Timing (FEC_CRS and FEC_COL)
MII Serial Management Channel Timing (FEC_MDIO and FEC_MDC)
Table 27. MII Asynchronous Inputs Signal Timing Parameter
Figure 19. MII Asynchronous Inputs Signal Timing Diagram
Figure 20. MII Serial Management Channel Timing Diagram
Parameter
i.MX27 and i.MX27L Data Sheet, Rev. 1.6
M12
M13
M14
Table 27
M9
M10
M11
Table 28
Min
1.5
lists the timing parameters.
M15
lists the timing parameters.
Max
FEC_TX_CLK period
Electrical Characteristics
Unit
59

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