ispPAC-CLK5610AV-01TN48C Lattice, ispPAC-CLK5610AV-01TN48C Datasheet - Page 41

Clock Drivers & Distribution ISP 0 Dlay Clck Gen w/Unv Fan-Out Buf I

ispPAC-CLK5610AV-01TN48C

Manufacturer Part Number
ispPAC-CLK5610AV-01TN48C
Description
Clock Drivers & Distribution ISP 0 Dlay Clck Gen w/Unv Fan-Out Buf I
Manufacturer
Lattice
Type
Zero Delay Programmable PLL Clock Generatorr

Specifications of ispPAC-CLK5610AV-01TN48C

Max Input Freq
400 MHz
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISPPAC-CLK5610AV-01TN48C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
ISPPAC-CLK5610AV-01TN48C
Manufacturer:
LATTICE
Quantity:
20 000
Lattice Semiconductor
ispClock5600A Family Data Sheet
2
VERIFY_INCR – This instruction copies the E
CMOS column pointed to by the address register into the data col-
umn register and then auto-increments the value of the address register. The device must already be in program-
ming mode for this instruction to execute.
DISCHARGE – This instruction is used to discharge the internal programming supply voltage after an erase or pro-
gramming cycle and prepares ispClock5600A for a read cycle.
2
PROGRAM_USERCODE – This instruction writes the contents of the UES register (32 bits) into E
CMOS memory.
The device must already be in programming mode for this instruction to execute.
2
USERCODE – This instruction both reads the UES string (32 bits) from E
CMOS memory into the UES register
and addresses the UES register so that this data may be shifted in and out.
HIGHZ – This instruction forces all outputs into a High-Z state.
CLAMP – This instruction drives I/O pins with the contents of the boundary scan register.
INTEST – This instruction performs in-circuit functional testing of the device.
ERASE_DONE – This instruction erases the ‘DONE’ bit only. This instruction is used to disable normal operation of
the device while in programming mode until a valid configuration pattern has been programmed.
PROGRAM_DONE – This instruction programs the ‘DONE’ bit only. This instruction is used to enable normal
device operation after programming is complete.
NOOP – This instruction behaves similarly to the CLAMP instruction.
1-41

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