S29GL128P11TFI020 Spansion Inc., S29GL128P11TFI020 Datasheet - Page 66

Flash 3V 128Mb Mirrorbit lowest address110ns

S29GL128P11TFI020

Manufacturer Part Number
S29GL128P11TFI020
Description
Flash 3V 128Mb Mirrorbit lowest address110ns
Manufacturer
Spansion Inc.

Specifications of S29GL128P11TFI020

Memory Type
NOR
Memory Size
128 Mbit
Access Time
110 ns
Data Bus Width
8 bit, 16 bit
Architecture
Sectored
Interface Type
Serial
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
50 mA
Mounting Style
SMD/SMT
Operating Temperature
+ 85 C
Package / Case
TSOP-56
Memory Configuration
128K X 16
Ic Interface Type
Parallel
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
TSOP
No. Of Pins
56
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
S29GL128P11TFI020
Manufacturer:
SPANSION
Quantity:
1 133
Part Number:
S29GL128P11TFI020
Manufacturer:
SPANSION
Quantity:
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Part Number:
S29GL128P11TFI020
0
Legend
X = Don’t care
RA = Address of the memory to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE# or CE# pulse, whichever happens later.
PD = Data to be programmed at location PA. Data latches on the rising edge of the WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A
WBL = Write Buffer Location. The address must be within the same write buffer page as PA.
WC = Word Count is the number of write buffer locations to load minus 1.
Notes
1. See
2. All values are in hexadecimal.
3. All bus cycles are write cycles unless otherwise noted.
4. Data bits DQ15-DQ8 are don’t cares for unlock and command cycles.
5. Address bits A
6. No unlock or command cycles required when reading array data.
7. The Reset command is required to return to reading array data when device is in the autoselect mode, or if DQ5 goes high (while the device is providing status
8. See
9. The fourth, fifth, and sixth cycles of the autoselect command sequence are read cycles.
10. The data is 00h for an unprotected sector and 01h for a protected sector. See “Autoselect Command Sequence” for more information. This is same as PPB
11. The data value for DQ7 is “1” for a serialized, protected Secured Silicon Sector region and “0” for an unserialized, unprotected region. See
12. Command is valid when device is ready to read array data or when device is in autoselect mode.
13. Command sequence returns device to reading array after being placed in a Write-to-Buffer-Abort state. Full command sequence is required if resetting out of
14. The Unlock-Bypass command is required prior to the Unlock-Bypass-Program command.
15. The Unlock-Bypass-Reset command is required to return to reading array data when the device is in the unlock bypass mode.
16. The system can read and program/program suspend in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. The Erase
17. The Erase Resume/Program Resume command is valid only during the Erase Suspend/Program Suspend modes.
18. The Exit command returns the device to reading the array.
64
Read
Reset
CFI Query
Program
Write to Buffer
Program Buffer to Flash (confirm)
Write-to-Buffer-Abort Reset
Chip Erase
Sector Erase
Erase Suspend/Program Suspend
Erase Resume/Program Resume
Secured Silicon Sector Entry
Secured Silicon Sector Exit
data).
Status Read except that the protect and unprotect statuses are inverted here.
for data and definitions.
abort while in Unlock Bypass mode.
Suspend command is valid only during a sector erase operation.
(6)
Manufacturer ID
Device ID
Sector Protect Verify
Secure Device Verify
Enter
Sector Erase
Chip Erase
Reset
(7)
Program
Table 7.1 on page 14
Table 7.2 on page 17
(12)
(15)
Command (Notes)
(14)
(8)
MAX
(14)
(14)
:A16 are don’t cares for unlock and command cycles, unless SA or PA required. (A
(10)
(11)
(18)
(13)
for description of bus operations.
for device ID values and definitions.
(17)
(16)
Table 12.3 S29GL-P Memory Array Command Definitions, x8
1
1
4
4
4
4
1
3
1
3
3
2
2
2
2
6
6
1
1
3
4
4
D a t a
Addr
XXX
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
XXX
XXX
XXX
XXX
AAA
AAA
XXX
XXX
AAA
AAA
RA
AA
SA
First
S29GL-P MirrorBit
Data
RD
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
F0
A0
B0
98
29
80
80
90
30
S h e e t
Addr
XXX
XXX
555
555
555
555
555
555
555
555
555
555
555
555
SA
PA
Second
Data
( A d v a n c e
PD
55
55
55
55
55
55
55
55
30
10
00
55
55
55
55
TM
Flash Family
max
Addr
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
–A16 uniquely select any sector.
555
SA
Bus Cycles (Notes 1–5)
Third
Data
A0
F0
90
90
90
90
25
20
80
80
88
90
MAX
I n f o r m a t i o n )
is the Highest Address pin.).
[SA]X04
Addr
AAA
AAA
X00
X02
X06
PA
SA
XX
Fourth
XX7E
Data
(10)
(11)
WC
PD
AA
AA
01
00
S29GL-P_00_A3 November 21, 2006
Addr
WBL
X1C
555
555
Fifth
Data
PD
(8)
55
55
Table 7.3 on page 17
Addr
WBL
X1E
AAA
SA
Sixth
Data
PD
(8)
10
30

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