MPC8536EAVTAVL Freescale Semiconductor, MPC8536EAVTAVL Datasheet - Page 102
MPC8536EAVTAVL
Manufacturer Part Number
MPC8536EAVTAVL
Description
Microprocessors (MPU) PQ38S 8536 SQUID
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8536EBVTAQG.pdf
(126 pages)
Specifications of MPC8536EAVTAVL
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
1500 MHz
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 90 C
Mounting Style
SMD/SMT
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
0 C
Package / Case
FCPBGA-783
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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UI
V
PCI Express
2.21.4.2
The TX eye diagram in
any real PCI Express interconnect + RX component.
There are two eye diagrams that must be met for the transmitter. Both eye diagrams must be aligned in time using the jitter
median to locate the center of the eye diagram. The different eye diagrams will differ in voltage depending whether it is a
transition bit or a de-emphasized bit. The exact reduced voltage level of the de-emphasized bit will always be relative to the
transition bit.
The eye diagram must be valid for any 250 consecutive UIs.
A recovered TX UI is calculated over 3500 consecutive unit intervals of sample data. The eye diagram is created using all edges
of the 250 consecutive UI in the center of the 3500 UI used for calculating the TX UI.
2.21.4.3
Table 72
component pins.
102
RX-DIFFp-p
Symbol
defines the specifications for the differential input at all receivers (RXs). The parameters are specified at the
Figure 69. Minimum Transmitter Timing and Voltage Output Compliance Specifications
Transmitter Compliance Eye Diagrams
Differential Receiver (RX) Input Specifications
It is recommended that the recovered TX UI is calculated using all edges in the 3500
consecutive UI interval with a fit algorithm using a minimization merit function (that is,
least squares and median deviation fits).
MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
Unit Interval
Differential
Peak-to-Peak
Output Voltage
Figure 69
Parameter
Table 72. Differential Receiver (RX) Input Specifications
is specified using the passive compliance/test measurement load (see
399.8
0.175
Min
8
Nom
400
—
NOTE
400.12
1.200
Max
Units
ps
V
Each UI is 400 ps ± 300 ppm. UI does not
account for Spread Spectrum Clock dictated
variations. See Note 1.
V
See Note 2.
RX-DIFFp-p
= 2*|V
Comments
RX-D+
Freescale Semiconductor
Figure
– V
RX-D-
71) in place of
|
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