M4A5-128/64-12VNI Lattice, M4A5-128/64-12VNI Datasheet - Page 32

• Manufacturer Part Number: M4A5-128/64-12VNI
• Description: CPLD - Complex Programmable Logic Devices HI PERF E2CMOS PLD
• Manufacturer: Lattice

Specifications of M4A5-128/64-12VNI

• Number Of Macrocells: 128
• Number Of Product Terms Per Macro: 20
• Maximum Operating Frequency: 83.3 MHz
• Delay Time: 5 ns
• Number Of Programmable I/os: 160
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Package / Case: TQFP-100
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Circuit Type: Electrically Erasable
• Logic Function: Programmable
• Logic Type: CMOS
• Package Type: TQFP-100
• Special Features: High Speed, In-System Programmability
• Temperature, Operating, Range: -40 to +85 °C
• Voltage, Supply: 3 to 3.6 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

BLOCK DIAGRAM – M4A(3,5)-256/128
32
Block C I/O16–I/O23
Block D I/O24–I/O31
Block E I/O32–I/O39
Block F I/O40–I/O47
16
16
16
16
24
24
24
24
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
Output Switch
AND Logic Array
Output Switch
Output Switch
AND Logic Array
Output Switch
AND Logic Array
Macrocells
Macrocells
Macrocells
Macrocells
I/O48–I/O55
I/O8–I/O15
I/O Cells
I/O Cells
Matrix
I/O Cells
Matrix
I/O Cells
Matrix
68 X 90
Matrix
68 X 90
Block B
68 X 90
68 X 90
Block G
16
16
16
16
8
8
8
8
8
34
8
34
34
16
16
8
34
16
16
8
8
8
8
8
4
4
4
4
4
4
4
4
4
4
4
4
16
16
16
16
24
24
24
24
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
Output Switch
AND Logic Array
Output Switch
Output Switch
AND Logic Array
Output Switch
AND Logic Array
Macrocells
Macrocells
Macrocells
Macrocells
I/O56–I/O63
I/O0–I/O7
I/O Cells
I/O Cells
I/O Cells
I/O Cells
Matrix
Matrix
Matrix
68 X 90
68 X 90
Matrix
68 X 90
68 X 90
Block A
Block H
16
16
16
16
8
8
8
8
8
34
8
34
34
16
16
8
34
16
16
8
ispMACH 4A Family
8
8
8
8
4
4
4
4
4
4
4
4
4
4
4
4
CLK0–CLK3
4
I0–I13
14
4
4
4
4
4
4
4
4
4
4
4
4
4
8
8
8
8
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
AND Logic Array
AND Logic Array
I/O120–I/O127
I/O64–I/O71
Output Switch
Output Switch
Output Switch
Output Switch
Macrocells
I/O Cells
Macrocells
I/O Cells
I/O Cells
Block P
68 X 90
68 X 90
Macrocells
I/O Cells
68 X 90
68 X 90
Macrocells
Block I
16
16
34
34
16
16
16
16
34
34
16
16
Matrix
8
Matrix
8
8
Matrix
8
Matrix
8
8
8
8
16
16
16
16
24
24
24
24
16
16
16
16
4
4
4
4
4
4
4
4
4
4
4
4
8
8
8
8
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
AND Logic Array
AND Logic Array
I/O112–I/O119
I/O72–I/O79
Output Switch
Output Switch
Output Switch
Output Switch
Macrocells
I/O Cells
Macrocells
I/O Cells
I/O Cells
Macrocells
I/O Cells
Block O
Macrocells
68 X 90
68 X 90
68 X 90
68 X 90
Block J
16
16
34
34
16
16
16
16
34
34
16
16
8
Matrix
8
8
8
Matrix
Matrix
Matrix
8
8
8
8
16
16
16
16
24
24
24
24
16
16
16
16
I/O104–I/O111 Block N
I/O96–I/O103 Block M
I/O88–I/O95 Block L
I/O80–I/O87 Block K
17466G-024