LCMXO1200C-3TN100I Lattice, LCMXO1200C-3TN100I Datasheet - Page 45
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LCMXO1200C-3TN100I
Manufacturer Part Number
LCMXO1200C-3TN100I
Description
CPLD - Complex Programmable Logic Devices 1200 LUTs 73 I/O 1.8/2.5/3.3V IND
Manufacturer
Lattice
Datasheet
1.LCMXO640C-3TN100I.pdf
(96 pages)
Specifications of LCMXO1200C-3TN100I
Memory Type
SRAM
Number Of Macrocells
600
Delay Time
5.1 ns
Number Of Programmable I/os
73
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Supply Current
21 mA
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Package / Case
TQFP-100
Mounting Style
SMD/SMT
Supply Voltage (max)
3.465 V
Supply Voltage (min)
1.71 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LCMXO1200C-3TN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Switching Test Conditions
Figure 3-6 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Figure 3-5.
Figure 3-6. Output Test Load, LVTTL and LVCMOS Standards
Table 3-5. Test Fixture Required Components, Non-Terminated Interfaces
LVTTL and LVCMOS settings (L -> H, H -> L)
LVTTL and LVCMOS 3.3 (Z -> H)
LVTTL and LVCMOS 3.3 (Z -> L)
Other LVCMOS (Z -> H)
Other LVCMOS (Z -> L)
LVTTL + LVCMOS (H -> Z)
LVTTL + LVCMOS (L -> Z)
Note: Output test conditions for all other interfaces are determined by the respective standards.
Test Condition
DUT
V
R1
T
3-19
188
R
1
CL
0pF
0pF
C
L
Test Poi nt
DC and Switching Characteristics
LVTTL, LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = V
LVCMOS 1.8 = V
LVCMOS 1.5 = V
LVCMOS 1.2 = V
1.5
V
V
V
V
OH
OL
CCIO
CCIO
- 0.15
- 0.15
/2
/2
MachXO Family Data Sheet
Timing Ref.
CCIO
CCIO
CCIO
CCIO
/2
/2
/2
/2
V
V
V
V
V
V
V
—
—
—
—
—
OH
OH
OH
OL
OL
OL
T