LCMXO1200C-3TN100I Lattice, LCMXO1200C-3TN100I Datasheet - Page 58
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LCMXO1200C-3TN100I
Manufacturer Part Number
LCMXO1200C-3TN100I
Description
CPLD - Complex Programmable Logic Devices 1200 LUTs 73 I/O 1.8/2.5/3.3V IND
Manufacturer
Lattice
Datasheet
1.LCMXO640C-3TN100I.pdf
(96 pages)
Specifications of LCMXO1200C-3TN100I
Memory Type
SRAM
Number Of Macrocells
600
Delay Time
5.1 ns
Number Of Programmable I/os
73
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Supply Current
21 mA
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Package / Case
TQFP-100
Mounting Style
SMD/SMT
Supply Voltage (max)
3.465 V
Supply Voltage (min)
1.71 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LCMXO1200C-3TN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
LCMXO256 and LCMXO640 Logic Signal Connections: 100 csBGA (Cont.)
*NC for “E” devices.
**Primary clock inputs are single-ended.
Number
Ball
A14
H14
P10
C3
N9
G1
A4
B4
A3
B3
A2
A1
B2
B9
B5
P1
Function
GNDIO0
VCCIO0
VCCIO0
VCCIO0
VCCIO1
VCCIO1
VCCIO1
PT2D
PT2C
PT3A
PT2F
PT2E
PT2B
PT2A
GND
GND
Ball
LCMXO256
Bank
0
0
0
0
0
0
0
0
0
0
0
1
1
1
-
-
Function
Dual
Differen-
tial
C
C
C
T
T
T
T
4-13
Number
Ball
A14
H14
P10
G1
A4
B4
A3
B3
A2
C3
A1
B2
N9
B9
B5
P1
Function
GNDIO0
VCCIO0
VCCIO1
VCCIO1
VCCIO2
VCCIO3
VCCIO3
PT3B
PT3A
PT2E
PT2B
PT2C
PT2A
PT2F
GND
GND
Ball
MachXO Family Data Sheet
LCMXO640
Bank
0
0
0
0
0
0
0
0
0
1
1
2
3
3
-
-
Pinout Information
Function
Dual
Differen-
tial
C
C
C
T
T
T
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