LC4256ZC-75TN100C Lattice, LC4256ZC-75TN100C Datasheet - Page 72

• Manufacturer Part Number: LC4256ZC-75TN100C
• Description: CPLD - Complex Programmable Logic Devices PROGRAMMABLE SUPER FAST HI DENSITY PLD
• Manufacturer: Lattice

Specifications of LC4256ZC-75TN100C

• Memory Type: EEPROM
• Number Of Macrocells: 256
• Number Of Product Terms Per Macro: 80
• Maximum Operating Frequency: 200 MHz
• Delay Time: 4.5 ns
• Number Of Programmable I/os: 48
• Operating Supply Voltage: 1.8 V
• Supply Current: 0.341 mA
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Package / Case: TQFP-100
• Mounting Style: SMD/SMT
• Supply Voltage (max): 1.9 V
• Supply Voltage (min): 1.7 V
• Package: 100TQFP
• Family Name: ispMACH® 4000Z
• Number Of Macro Cells: 256
• Maximum Propagation Delay Time: 7.5 ns
• Number Of User I/os: 64
• Number Of Logic Blocks/elements: 36
• Typical Operating Supply Voltage: 1.8 V
• Operating Temperature: 0 to 90 °C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
ispMACH 4256V/B/C, 4384V/B/C, 4512V/B/C Logic Signal Connections:
256-Ball fpBGA (Cont.)
Note: VCC, VCCO and GND are tied together to their respective common signal on the package substrate. See Power Supply and NC Con-
nections table for VCC/ VCCO/GND pin definitions.
Number
Ball
E7
A3
B4
C5
A2
E6
B3
C4
D4
E5
F7
-
-
-
Bank
I/O
0
0
0
0
0
0
0
0
0
0
0
0
-
-
ispMACH 4256V/B/C
GLB/MC/Pad
VCC
B10
B12
B14
NC
NC
NC
B0
B2
B4
B6
B8
-
-
128-I/O
ORP
B^0
B^1
B^2
B^3
B^4
B^5
B^6
B^7
-
-
-
-
-
-
ispMACH 4256V/B/C
GLB/MC/Pad
VCC
B10
B12
B14
NC
NC
B1
B2
B4
B6
B8
B9
-
-
160-I/O
72
ORP
ispMACH 4000V/B/C/Z Family Data Sheet
B^1
B^2
B^3
B^4
B^5
B^6
B^7
B^8
B^9
-
-
-
-
-
GND (Bank 0)
GLB/MC/Pad
ispMACH 4384V/B/C
GND
VCC
D10
B10
B12
B14
B0
B2
B4
B6
B8
D8
F8
ORP
D^5
D^4
F^4
B^0
B^1
B^2
B^3
B^4
B^5
B^6
B^7
-
-
-
GND (Bank 0)
GLB/MC/Pad
ispMACH 4512V/B/C
VCC
GND
D12
B10
B12
B14
B0
B2
B4
B6
B8
F0
F2
ORP
D^3
B^0
B^1
B^2
B^3
B^4
B^5
B^6
B^7
F^0
F^1
-
-
-