A2F200M3F-1FGG484 Actel, A2F200M3F-1FGG484 Datasheet - Page 155

• Manufacturer Part Number: A2F200M3F-1FGG484
• Description: FPGA - Field Programmable Gate Array 200K System Gates SmartFusion
• Manufacturer: Actel

Specifications of A2F200M3F-1FGG484

• Processor Series: A2F200
• Core: ARM Cortex M3
• Number Of Logic Blocks: 8
• Maximum Operating Frequency: 120 MHz
• Number Of Programmable I/os: 161
• Data Ram Size: 4608 bit
• Delay Time: 200 ns
• Supply Voltage (max): 3.6 V
• Supply Current: 1 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 200000
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Note:
Number
K10
K11
K12
K13
K14
K15
K16
Pin
J10
J12
J13
J14
J15
J16
J11
K1
K2
K3
K4
K5
K6
K7
K8
K9
J5
J6
J7
J8
J9
L1
L2
L3
L4
L5
Shading denotes pins that do not have completely identical functions from density to density. For
example, the bank assignment can be different for an I/O, or the function might be available only
on a larger density device.
UART_0_RXD/GPIO_21
UART_1_TXD/GPIO_28
UART_1_RXD/GPIO_29
UART_0_TXD/GPIO_20
I2C_0_SDA/GPIO_22
I2C_1_SDA/GPIO_30
I2C_0_SCL/GPIO_23
I2C_1_SCL/GPIO_31
A2F060 Function
MSS_RESET_N
VCCMSSIOB2
VCCMSSIOB2
VCCMSSIOB4
VCCMSSIOB4
IO49RSB4V0
IO48RSB4V0
IO52RSB4V0
IO51RSB4V0
IO50RSB4V0
VCCRCOSC
GNDQ
GND
GND
GND
GND
GND
GND
GND
GND
VCC
VCC
VCC
VCC
NC
R e v i s i o n 6
256-Pin FBGA
SmartFusion Intelligent Mixed Signal FPGAs
MAC_CRSDV/IO51RSB4V0
MAC_RXER/IO50RSB4V0
MAC_MDIO/IO49RSB4V0
MAC_TXEN/IO52RSB4V0
MAC_MDC/IO48RSB4V0
UART_0_RXD/GPIO_21
UART_1_RXD/GPIO_29
UART_1_TXD/GPIO_28
UART_0_TXD/GPIO_20
I2C_0_SDA/GPIO_22
I2C_1_SDA/GPIO_30
I2C_0_SCL/GPIO_23
I2C_1_SCL/GPIO_31
A2F200 Function
MSS_RESET_N
VCCMSSIOB2
VCCMSSIOB2
VCCMSSIOB4
VCCMSSIOB4
VCCRCOSC
MAC_CLK
GNDQ
GND
GND
VCC
GND
VCC
GND
GND
VCC
GND
VCC
GND
GND
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