AGLP030V5-CSG289 Actel, AGLP030V5-CSG289 Datasheet - Page 45

• Manufacturer Part Number: AGLP030V5-CSG289
• Description: FPGA - Field Programmable Gate Array 30K System Gates
• Manufacturer: Actel

Specifications of AGLP030V5-CSG289

• Processor Series: AGLP030
• Core: IP Core
• Number Of Macrocells: 256
• Maximum Operating Frequency: 250 MHz
• Number Of Programmable I/os: 4
• Data Ram Size: 4608 bit
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AGLP-Eval-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 30 K
• Package / Case: CSP-289
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-44 • 3.3 V LVCMOS Wide Range Low Slew – Applies to 1.2 V DC Core Voltage
Table 2-45 • 3.3 V LVCMOS Wide Range High Slew – Applies to 1.2 V DC Core Voltage
Drive
Strength
100 µA
100 µA
100 µA
100 µA
100 µA
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 µA. Drive
2. For specific junction temperature and voltage supply levels, refer to
Drive
Strength
100 µA
100 µA
100 µA
100 µA
100 µA
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 µA. Drive
2. For specific junction temperature and voltage supply levels, refer to
3. Software default selection highlighted in gray.
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
Equivalent
Equivalent
Commercial-Case Conditions: T
Commercial-Case Conditions: T
Software
Strength
Software
Strength
Option
Option
Default
Default
12 mA
16 mA
12 mA
16 mA
Drive
Drive
4 mA
6 mA
8 mA
4 mA
6 mA
8 mA
1
1
Speed
Grade
Speed
Grade
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
t
DOUT
0.98
0.98
0.98
0.98
0.98
t
DOUT
0.98
0.98
0.98
0.98
0.98
6.68
5.51
5.51
4.75
4.75
t
4.16
3.54
3.54
3.21
3.21
DP
t
J
J
DP
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.7 V
= 70°C, Worst-Case V
0.19
0.19
0.19
0.19
0.19
t
0.19
0.19
0.19
0.19
0.19
DIN
t
DIN
R ev i si o n 1 1
1.32
1.32
1.32
1.32
1.32
1.32
1.32
1.32
t
1.32
1.32
t
PY
PY
1.92
1.92
1.92
t
1.92
1.92
PYS
t
1.92
1.92
1.92
1.92
1.92
Table 2-6 on page 2-6
Table 2-6 on page 2-6
PYS
CC
t
= 1.425 V, Worst-Case VCCI = 2.7 V
EOUT
0.67
0.67
0.67
0.67
0.67
t
EOUT
0.67
0.67
0.67
0.67
0.67
IGLOO PLUS Low Power Flash FPGAs
6.68 5.74 3.13 3.47
5.51 4.94 3.48
5.51 4.94 3.48
4.75 4.36 3.73 4.52
4.75 4.36 3.73 4.52
t
4.16
3.54
3.54
3.21
3.21
ZL
t
ZL
for derating values.
for derating values.
t
ZH
3.32 3.12 3.66
2.79 3.48 4.31
2.79 3.48 4.31
2.52 3.73 4.73
2.52 3.73 4.73
t
ZH
t
LZ
t
LZ
4.11
4.11
t
HZ
t
HZ
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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