LFXP3C-4TN100C Lattice, LFXP3C-4TN100C Datasheet - Page 216

• Manufacturer Part Number: LFXP3C-4TN100C
• Description: FPGA - Field Programmable Gate Array 3.1K LUTs 62 I/O 1.8/2.5/3.3V -4 Spd
• Manufacturer: Lattice

Specifications of LFXP3C-4TN100C

• Number Of Programmable I/os: 62
• Data Ram Size: 55296
• Supply Voltage (max): 3.465 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.71 V
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Memory Usage Guide
Lattice Semiconductor
LatticeECP/EC and LatticeXP Devices
Figure 9-62. PFU Based ROM Timing Waveform – with Output Registers
Reset
OutClock
OutClockEn
t
t
SUADDR_PFU
HADDR_PFU
Address
Add_0
Add_1
Add_2
Q
Invalid Data
Data_0
Data_1
t
CORAM_PFU
Initializing Memory
In the EBR based ROM or RAM memory modes and the PFU based ROM memory mode, it is possible to specify
the power-on state of each bit in the memory array. Each bit in the memory array can have one of two values: 0 or
1.
Initialization File Format
The initialization file is an ASCII file, which a user can create or edit using any ASCII editor. IPexpress supports
three types of memory file formats:
1. Binary file
2. Hex File
3. Addressed Hex
The file name for the memory initialization file is *.mem (<file_name>.mem). Each row depicts the value to be
stored in a particular memory location. The number of characters (or the number of columns) represents the num-
ber of bits for each address (or the width of the memory module).
The Initialization File is primarily used for configuring the ROMs. The EBR in RAM mode can optionally use this Ini-
tialization File also to preload the memory contents.
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