AGLN125V5-ZVQG100 Actel, AGLN125V5-ZVQG100 Datasheet - Page 40
![FPGA - Field Programmable Gate Array 125K System Gates IGLOO nano](/photos/16/14/161495/tqfp-100_sml.jpg)
AGLN125V5-ZVQG100
Manufacturer Part Number
AGLN125V5-ZVQG100
Description
FPGA - Field Programmable Gate Array 125K System Gates IGLOO nano
Manufacturer
Actel
Datasheet
1.AGLN030V5-ZUCG81.pdf
(140 pages)
Specifications of AGLN125V5-ZVQG100
Processor Series
AGLN125
Core
IP Core
Number Of Macrocells
1024
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
71
Data Ram Size
36 Kbit
Supply Voltage (max)
1.5 V
Supply Current
18 uA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Development Tools By Supplier
AGLN-Nano-Kit, AGLN-Z-Nano-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FLASHPRO 4, FlashPro 3, FLASHPRO LITE
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
125 K
Package / Case
VQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AGLN125V5-ZVQG100
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
AGLN125V5-ZVQG100I
Manufacturer:
Actel
Quantity:
160
Company:
Part Number:
AGLN125V5-ZVQG100I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
AGLN125V5-ZVQG100I
Manufacturer:
MICROSEMI/美高森美
Quantity:
20 000
IGLOO nano DC and Switching Characteristics
Table 2-34 • Minimum and Maximum DC Input and Output Levels
Figure 2-7 • AC Loading
Table 2-35 • 3.3 V LVTTL/LVCMOS AC Waveforms, Measuring Points, and Capacitive Loads
2- 26
3.3 V LVTTL /
3.3 V LVCMOS
Drive
Strength
2 mA
4 mA
6 mA
8 mA
Notes:
1. I
2. I
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
Input LOW (V)
0
*
Measuring point = Vtrip. See
current is larger when operating outside recommended ranges.
IL
IH
is the input leakage current per I/O pin over recommended operating conditions where –0.3 < VIN < VIL.
is the input leakage current per I/O pin over recommended operating conditions where VIH < VIN < VCCI. Input
Single-Ended I/O Characteristics
3.3 V LVTTL / 3.3 V LVCMOS
Low-Voltage Transistor–Transistor Logic (LVTTL) is a general purpose standard (EIA/JESD) for 3.3 V
applications. It uses an LVTTL input buffer and push-pull output buffer.
Test Point
Datapath
Min.
–0.3
–0.3
–0.3
–0.3
V
VIL
Max.
0.8
0.8
0.8
0.8
V
Table 2-23 on page 2-20
5 pF
Input HIGH (V)
Min.
V
2
2
2
2
VIH
3.3
Max.
3.6
3.6
3.6
3.6
Enable Path
V
Test Point
R = 1 k
Max.
VOL
0.4
0.4
0.4
0.4
V
for a complete table of trip points.
R ev i sio n 1 1
Measuring Point* (V)
VOH
Min.
2.4
2.4
2.4
2.4
V
R to VCCI for t
R to GND for t
35 pF for t
5 pF for t
mA mA
I
1.4
OL
2
4
6
8
I
OH
2
6
HZ
4
8
ZH
/ t
/ t
LZ
LZ
HZ
ZHS
Max.
mA
I
OSL
25
25
51
51
/ t
/ t
3
ZL
/ t
ZH
/ t
ZL
/ t
ZLS
/ t
ZHS
ZLS
C
Max.
I
mA
OSH
LOAD
27
27
54
54
3
5
(pF)
I
µA
IL
10
10
10
10
1
4
I
µA
IH
10
10
10
10
2
4