AD9553BCPZ Analog Devices Inc, AD9553BCPZ Datasheet - Page 6

• Manufacturer Part Number: AD9553BCPZ
• Description: IC INTEGER-N CLCK GEN 32LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9553BCPZ

• Clock Ic Type: PLL Clock Driver
• Ic Interface Type: 3 Wire, Serial
• Frequency: 710MHz
• No. Of Outputs: 2
• Supply Current: 162mA
• Supply Voltage Range: 0V To 3.3V
• Digital Ic Case Style: LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9553
OUTPUT CHARACTERISTICS
Table 8.
Parameter
LVPECL MODE
LVDS MODE
CMOS MODE
1
The listed values are for the slower edge (rise or fall).
Differential Output Voltage Swing
Common-Mode Output Voltage
Frequency Range
Duty Cycle
Rise/Fall Time
Differential Output Voltage Swing
Offset Voltage
Short-Circuit Output Current
Frequency Range
Duty Cycle
Rise/Fall Time
Output Voltage High, V
Output Voltage Low, V
Frequency Range
Duty Cycle
Rise/Fall Time
Balanced, V
Unbalanced, ΔV
Common Mode, V
Common-Mode Difference, ΔV
I
I
I
I
OH
OH
OL
OL
= 10 mA
= 1 mA
= 10 mA
= 1 mA
1
1
1
OD
(20% to 80%)
(20% to 80%)
(20% to 80%)
OD
OS
OL
OH
OS
Min
690
VDD − 1. 6 6
0
40
297
1.17
0
40
2.8
2.8
0
45
Typ
800
VDD − 1.34
255
17
285
500
Rev. A | Page 6 of 44
Max
890
VDD − 1.01
810
60
305
398
8.3
1.35
7.3
24
810
60
355
0.5
0.3
200
55
745
Unit
mV
V
MHz
%
ps
mV
mV
V
mV
mA
MHz
%
ps
V
V
V
V
MHz
%
ps
Output driver static (for dynamic performance, see
Figure 18)
100 Ω termination between both pins of the
output driver
Voltage swing between the pins of a differential
output pair with the output driver static
output driver
3.3 V CMOS; standard drive strength setting;
output toggle rates in excess of the maximum are
possible, but with reduced amplitude (see Figure 17)
Test Conditions/Comments
Output driver static
Up to 805 MHz output frequency
Output driver static (for dynamic performance, see
Figure 18)
Absolute difference between voltage swing of
normal pin and inverted pin with the output
driver static
(V
driver static
This is the absolute value of the difference
between V
when the complementary output is high with
output driver static
Output shorted to GND
Up to 805 MHz output frequency
100 Ω termination between both pins of the
Output driver static; standard drive strength setting
Output driver static; standard drive strength setting
At maximum output frequency
3.3 V CMOS; standard drive strength setting;
10 pF load
OH
+ V
OL
)/2 across a differential pair with output
OS
when the normal output is high vs.