ML610Q412P-NNNTB03A7 Rohm Semiconductor, ML610Q412P-NNNTB03A7 Datasheet - Page 13

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ML610Q412P-NNNTB03A7

Manufacturer Part Number
ML610Q412P-NNNTB03A7
Description
MCU 8BIT 16K FLASH 120-TQFP
Manufacturer
Rohm Semiconductor

Specifications of ML610Q412P-NNNTB03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
625kHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML610Q412P-NNNTB03A7
Manufacturer:
ROHM
Quantity:
750
Part Number:
ML610Q412P-NNNTB03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
Chapter 26
Chapter 27
Chapter 28
Chapter 29
26. LCD Drivers ................................................................................................................................................. 26-1
27. Battery Level Detector.................................................................................................................................. 27-1
28. Power Supply Circuit.................................................................................................................................... 28-1
29. On-Chip Debug Function.............................................................................................................................. 29-1
25.3 Description of Operation........................................................................................................................... 25-9
26.1 Overview................................................................................................................................................... 26-1
26.2 Description of Registers............................................................................................................................ 26-6
26.3 Description of Operation......................................................................................................................... 26-13
27.1 Overview................................................................................................................................................... 27-1
27.2 Description of Registers............................................................................................................................ 27-2
27.3 Description of Operation........................................................................................................................... 27-5
28.1 Overview................................................................................................................................................... 28-1
28.2 Description of Operation........................................................................................................................... 28-2
29.1 Overview................................................................................................................................................... 29-1
29.2 Method of Connecting to On-Chip Debug Emulator ................................................................................ 29-1
29.3 Flash Memory Rewrite Function .............................................................................................................. 29-2
25.2.5
25.2.6
25.2.7
25.2.8
25.3.1 Settings of A/D Conversion Channels................................................................................................ 25-9
25.3.2
26.1.1
26.1.2
26.1.3
26.1.4
26.2.1
26.2.2
26.2.3
26.2.4
26.2.5
26.2.6
26.3.1
26.3.2
26.3.3
26.3.4
27.1.1
27.1.2
27.2.1
27.2.2
27.2.3
27.3.1
27.3.2
28.1.1
28.1.2
28.1.3
SA-ADC Result Register 1H (SADR1H) ......................................................................................... 25-5
SA-ADC Control Register 0 (SADCON0) ....................................................................................... 25-6
SA-ADC Control Register 1 (SADCON1) ....................................................................................... 25-7
SA-ADC Mode Register 0 (SADMOD0) ......................................................................................... 25-8
Operation of the Successive Approximation A/D Converter.......................................................... 25-10
Features............................................................................................................................................. 26-1
Configuration of the LCD Drivers .................................................................................................... 26-2
Configuration of the Bias Generation Circuit ................................................................................... 26-3
List of Pins........................................................................................................................................ 26-4
List of Registers ................................................................................................................................ 26-6
Bias Circuit Control Register 0 (BIASCON).................................................................................... 26-7
Display Control Register (DSPCNT)................................................................................................ 26-8
Display Mode Register 0 (DSPMOD0) ............................................................................................ 26-9
Display Control Register (DSPCON) ............................................................................................. 26-10
Display Registers (DSPR00 to DSPR23 or DSPR00 to DSPR2B)................................................. 26-11
Operation of LCD Drivers and Bias Generation Circuit................................................................. 26-13
Display Register Segment Map....................................................................................................... 26-14
Segment Output Waveform ............................................................................................................ 26-16
Features............................................................................................................................................. 27-1
Configuration .................................................................................................................................... 27-1
List of Registers ................................................................................................................................ 27-2
Battery Level Detector Control Register 0 (BLDCON0).................................................................. 27-3
Battery Level Detector Control Register 1 (BLDCON1).................................................................. 27-4
Threshold Voltage............................................................................................................................. 27-5
Operation of Battery Level Detector................................................................................................. 27-6
Features............................................................................................................................................. 28-1
Configuration .................................................................................................................................... 28-1
List of Pins........................................................................................................................................ 28-1
Common Output Waveforms .......................................................................................................... 26-15
Contents – 9
ML610Q411/ML610Q412/ML610Q415 User’s Manual
Contents

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