STM32F100R6H6B STMicroelectronics, STM32F100R6H6B Datasheet - Page 73
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STM32F100R6H6B
Manufacturer Part Number
STM32F100R6H6B
Description
IC ARM CORTEX MCU 32KB 64TFBGA
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32F100R4T6B.pdf
(87 pages)
Specifications of STM32F100R6H6B
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
24MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFBGA
Core
ARM Cortex M3
For Use With
STM32100B-EVAL - EVAL BOARD FOR STM32F100VBT6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F100R6H6B
Manufacturer:
STMicroelectronics
Quantity:
10 000
STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB
Table 46.
1. Guaranteed by characterization, not tested in production.
2. Guaranteed by design, not tested in production.
3. Guaranteed by characterization, not tested in production.
Figure 36. 12-bit buffered /non-buffered DAC
1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly
Offset
Gain
error
t
3)
Update
rate
t
PSRR+
SETTLING
WAKEUP
Symbol
without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the
DAC_CR register.
(3)
(3)
(3)
(1)
(3)
(
Offset error
(difference between measured value
at Code (0x800) and the ideal value =
V
Gain error
Settling time (full scale: for a 10-bit
input code transition between the
lowest and the highest input codes
when DAC_OUT reaches final value
±1LSB
Max frequency for a correct
DAC_OUT change when small
variation in the input code (from code i
to i+1LSB)
Wakeup time from off state (Setting
the ENx bit in the DAC Control
register)
Power supply rejection ratio (to V
(static DC measurement
DAC characteristics (continued)
REF+
/2)
Parameter
Buffered/Non-buffered DAC
12-bit
digital to
analog
converter
DDA
Doc ID 16455 Rev 6
)
Buffer(1)
Min
3
6.5
–67
Typ
DACx_OUT
±10
±3
±12
±0.5
4
1
10
–40
Max
(1)
mV
LSB
LSB
%
µs
MS/s C
µs
dB
Unit
C
R
LOAD
LOAD
Given for the DAC in 12-bit
configuration
Given for the DAC in 10-bit at
V
Given for the DAC in 12-bit at
V
Given for the DAC in 12bit
configuration
C
C
input code between lowest and
highest possible ones.
No R
REF+
REF+
LOAD
LOAD
LOAD
Electrical characteristics
LOAD
= 3.6 V
= 3.6 V
≤ 50 pF, R
≤ 50 pF, R
≤ 50 pF, R
ai17157
, C
Comments
LOAD
LOAD
LOAD
LOAD
= 50 pF
≥ 5 kΩ
≥ 5 kΩ
≥ 5 kΩ
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