MC56F8257VLH Freescale Semiconductor, MC56F8257VLH Datasheet - Page 28

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257VLH

Manufacturer Part Number
MC56F8257VLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257VLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Package
64LQFP
Family Name
MC56F82xx
Maximum Speed
60 MHz
Data Bus Width
16 Bit
Interface Type
CAN/I2C/SCI/SPI
On-chip Dac
1-chx12-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Signal/Connection Descriptions
28
(XB_OUT2)
(XB_OUT3)
(XB_OUT4)
(XB_OUT5)
(XB_IN7)
GPIOF1
GPIOF2
GPIOF3
GPIOF4
GPIOF5
(CLKO)
(SDA1)
(RXD1)
(SCL1)
(TXD1)
Signal
Name
LQFP
44
Table 5. MC56F825x/MC56F824x Signal and Package Information (continued)
LQFP
48
38
LQFP
64
50
39
40
41
42
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Open-drain
Open-drain
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Input/
Input/
Input/
Type
Input
enabled
enabled
enabled
enabled
enabled
internal
internal
internal
internal
internal
During
Reset
pullup
pullup
pullup
pullup
pullup
Input,
Input,
Input,
Input,
Input,
State
Port F GPIO — This GPIO pin can be individually programmed as
an input or output pin.
CLKO — This is a buffered clock output; the clock source is selected
by clockout select (CLKOSEL) bits in the clock output select register
(CLKOUT) of the SIM.
XB_IN7 — Crossbar module input 7
After reset, the default state is GPIOF1.
Port F GPIO — This GPIO pin can be individually programmed as
an input or output pin.
SCL1 — The I
XB_OUT2 — Crossbar module output 2
After reset, the default state is GPIOF2.
Port F GPIO — This GPIO pin can be individually programmed as
an input or output pin.
SDA1 — The I
XB_OUT3 — Crossbar module output 3
After reset, the default state is GPIOF3.
Port F GPIO — This GPIO pin can be individually programmed as
an input or output pin.
TXD1 — The SCI1 transmit data output or transmit/receive in single
wire operation.
XB_OUT4 — Crossbar module output 4
After reset, the default state is GPIOF4.
Port F GPIO — This GPIO pin can be individually programmed as
an input or output pin.
RXD1 — The SCI1 receive data input.
XB_OUT5 — Crossbar module output 5
After reset, the default state is GPIOF5.
2
2
C1 serial clock.
C1 serial data line.
Signal Description
Freescale Semiconductor

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