D2-45057-QR-T Intersil, D2-45057-QR-T Datasheet - Page 24

• Manufacturer Part Number: D2-45057-QR-T
• Description: IC DGTL AMP PWM CTRLR 68QFN
• Manufacturer: Intersil
• Series: D2Audio™r
• Type: Class Dr

Specifications of D2-45057-QR-T

• Output Type: 2-Channel (Stereo)
• Max Output Power X Channels @ Load: 30W x 1 @ 8 Ohm
• Voltage - Supply: 9 V ~ 26 V
• Mounting Type: Surface Mount
• Package / Case: 68-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Configuration Setting
The configuration mode is assigned through two pairs of
pin settings. When the D2-45057, D2-45157 device exits
its reset state, the logic status of the PSSYNC/CFG1 and
nERROR/CFG0 pins is latched into internal device
registers. During this initialization time, these pins
operate as logic inputs. After completion of the
initialization and the internal firmware begins executing,
these pins are re-assigned as outputs for their shared
functions, and the internal latched logic state that defines
the configuration mode remains until the device is
powered down or reset again. The OCFG0 and OCFG1 pin
status is not latched; those pins are to remain in their
pull-up or pull-down state.
Selection of one of the four configuration modes is
defined by strapping the configuration pins high or low:
• OCFG0 and OCFG1, to define the output power stage
• and nERROR/CFG0 and PSSYNC/CFG1 pins to define
TEMPREF/
nERROR/
PSSYNC/
TEMP1/
configuration;
the amplifier and channel configuration
NAME
VOL1/
VOL0/
MISO
MOSI
CFG0
CFG1
PIN
SCK
nSS
Output SPI Cock Output.
Output
Output
Input
Input
Input
Input
Input
I/O
or
or
PIN STATE DURING
TABLE 5. MULTI-FUNCTION I/O CONTROL PIN ASSIGNMENT AND OPERATION
SPI Master Input or Slave
Output. Function (Master or
Slave) determined by nSS
input state.
SPI Master Output or Slave
Input. Function (Master or
Slave) determined by nSS
input state.
(CFG0) Configuration Mode
Input Select. Uses pull-up or
pull-down to set logic input
level, to define one of 4
amplifier configurations.
(CFG1) Configuration Mode
Input Select. Uses pull-up or
pull-down to set logic input
level, to define one of 4
amplifier configurations.
SPI Slave Select.
INITIALIZATION
24
FUNCTION
D2-45057, D2-45157
Output Active-Low Output Amplifier
Output Sync Output for
PIN STATE DURING OPERATION
Input
Input
Input
I/O
I/O
Temperature Monitor
Reference. Used for
Temperature Monitoring
Algorithm.
input. Used for Monitoring
Rotary-Encoder Volume
Control.
Temperature monitor
reference I/O pin. Used for
Temperature Monitoring
Algorithm.
Protection and Monitoring
Status Indication.
Synchronizing On-Board
Power Supply regulator.
Volume Control Phase-A
input. Used for monitoring
rotary-encoder volume
control.
Volume Control Phase-B
These four pins are connected to either a high (+3.3V)
level or low (ground = 0) level. Connection should be
through a 10kΩ resistor, and not directly to supply or
ground.
Table 6 shows the audio processing channel
assignment, audio content, and output assignments for
each of the four configuration modes.
• Both pairs of configuration setting pins (OCFG0,
In modes 2 and 3, the filtering for high and low pass
crossovers is applied to the audio signal flow path,
enabling the appropriate high or low pass content to be
properly filtered for the PWM output channels.
OCFG1) and (PSSYNC/CFG1, nERROR/CFG0) must be
used and both must be set to the same configuration
mode.
FUNCTION
Typical connection is to 49.9kΩ
resistor as temperature monitor
reference. Available for SPI connect
if SPI is used in application.
Typical connection to +3.3V with
10kΩ pull-up resistors, and to 2-bit
volume control encoder.
Typical connection is to 100kΩ NTC
resistor as temperature monitor
reference. Available for SPI connect
if SPI is used in application.
Connects to +3.3V or to ground with
10 kΩ resistor, to select logic high or
low for setting configuration. Also
connects to input of monitor or
indicator circuit to provide status.
(Referenced as “PSTEMP” on some
reference designs.)
Connects to +3.3V or to ground with
10kΩ resistor, to select logic high or
low for setting configuration. Also
connects to clock sync input of
on-board switching regulator.
(Referenced as “PSCURR” on some
reference designs.)
Typical connection to +3.3V with
10kΩ pull-up resistors, and to 2-bit
volume control encoder.
CONNECTION REFERENCE
July 29, 2010
FN6785.0