74LVC2G38GD,125 NXP Semiconductors, 74LVC2G38GD,125 Datasheet - Page 3

IC GATE NAND DUAL 2INP OD XSON8U

74LVC2G38GD,125

Manufacturer Part Number
74LVC2G38GD,125
Description
IC GATE NAND DUAL 2INP OD XSON8U
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC2G38GD,125

Product
NAND
Logic Family
CMOS
Number Of Gates
2
Propagation Delay Time
4.2 ns, 5.2 ns, 5.5 ns, 6 ns, 10.8 ns
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
XSON-8U
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5474-2
NXP Semiconductors
5. Functional diagram
6. Pinning information
74LVC2G38
Product data sheet
Fig 1.
Fig 3.
Fig 4.
Logic symbol
Functional diagram (one gate)
Pin configuration SOT505-2 and SOT765-1
GND
1A
1B
2Y
6.1 Pinning
1
2
3
4
1A
1B
2A
2B
74LVC2G38
001aah753
001aab829
1Y
2Y
8
7
6
5
All information provided in this document is subject to legal disclaimers.
V
1Y
2B
2A
CC
A
B
Rev. 8 — 4 November 2010
Fig 2.
Fig 5.
mnb131
IEC logic symbol
Pin configuration SOT833-1, SOT1089,
SOT1116 and SOT1203
GND
Y
Dual 2-input NAND gate; open drain
GND
1A
1B
2Y
Transparent top view
74LVC2G38
1
2
3
4
001aah754
&
&
001aab830
74LVC2G38
8
7
6
5
V
1Y
2B
2A
CC
© NXP B.V. 2010. All rights reserved.
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