W25Q64CVSSIG Winbond Electronics, W25Q64CVSSIG Datasheet - Page 22

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W25Q64CVSSIG

Manufacturer Part Number
W25Q64CVSSIG
Description
IC SPI FLASH 64MBIT 8-SOIC
Manufacturer
Winbond Electronics
Datasheet

Specifications of W25Q64CVSSIG

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
64M (8M x 8)
Speed
80MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (0.083", 2.10mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q5822008

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W25Q64CVSSIG
Manufacturer:
WINBOND/华邦
Quantity:
20 000
Company:
Part Number:
W25Q64CVSSIG
Quantity:
15
W25Q64CV
11.2.5 Write Enable (06h)
The Write Enable instruction (Figure 4) sets the Write Enable Latch (WEL) bit in the Status Register to a
1. The WEL bit must be set prior to every Page Program, Quad Page Program, Sector Erase, Block
Erase, Chip Erase, Write Status Register and Erase/Program Security Registers instruction. The Write
Enable instruction is entered by driving /CS low, shifting the instruction code “06h” into the Data Input (DI)
pin on the rising edge of CLK, and then driving /CS high.
Figure 4. Write Enable Instruction Sequence Diagram
11.2.6 Write Enable for Volatile Status Register (50h)
The non-volatile Status Register bits described in section 11.1 can also be written to as volatile bits. This
gives more flexibility to change the system configuration and memory protection schemes quickly without
waiting for the typical non-volatile bit write cycles or affecting the endurance of the Status Register non-
volatile bits. To write the volatile values into the Status Register bits, the Write Enable for Volatile Status
Register (50h) instruction must be issued prior to a Write Status Register (01h) instruction. Write Enable
for Volatile Status Register instruction (Figure 5) will not set the Write Enable Latch (WEL) bit, it is only
valid for the Write Status Register instruction to change the volatile Status Register bit values.
Instruction (50h)
Figure 5. Write Enable for Volatile Status Register Instruction Sequence Diagram
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