CAT34TS02VP2GT4B ON Semiconductor, CAT34TS02VP2GT4B Datasheet - Page 10

IC TEMP SENSOR 2KB MEM 8-TDFN

CAT34TS02VP2GT4B

Manufacturer Part Number
CAT34TS02VP2GT4B
Description
IC TEMP SENSOR 2KB MEM 8-TDFN
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT34TS02VP2GT4B

Function
Temp Monitoring System (Sensor)
Topology
ADC (Sigma Delta), Comparator, Register Bank
Sensor Type
Internal
Sensing Temperature
-40°C ~ 125°C
Output Type
I²C™, SPI™
Output Alarm
Yes
Output Fan
No
Voltage - Supply
2.97 V ~ 3.63 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-WFDFN Exposed Pad
Digital Output - Bus Interface
I2C, SMBus
Digital Output - Number Of Bits
12 bit
Supply Voltage (min)
3.3 V
Description/function
Digital Output Temperature Sensor with On-board SPD EEPROM
Maximum Operating Temperature
+ 130 C
Minimum Operating Temperature
- 45 C
Supply Current
500 uA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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CAT34TS02
READ OPERATIONS
Immediate Read
Upon power-up, the address counters for both the
Temperature Sensor (TS) and on-board EEPROM
are initialized to 00h. The TS address counter will
thus point to the Capability Register and the
EEPROM address counter will point to the first
location in memory. The two address counters may
be updated by subsequent operations.
A CAT34TS02 presented with a Slave address
containing a ‘1’ in the R/W ¯ ¯ position will acknowledge
the Slave address and will then start transmitting
data being pointed at by the current EEPROM data
or respectively TS register address counter. The
Master stops this transmission by responding with
NoACK, followed by a STOP (Figure 9).
Selective Read
The Read operation can be started at an address
different from the one stored in the respective
address counters, by preceeding the Immediate
Read sequence with a ‘data less’ Write operation.
The Master sends out a START, Slave address and
address byte, but rather than following up with data
(as in a Write operation), the Master then issues
another START and continuous with an Immediate
Read sequence (Figure 10).
Sequential EEPROM Read
EEPROM data can be read out indefinitely, as long
as the Master responds with ACK (Figure 11). The
internal address count is automatically incremented
after every data byte sent to the bus. If the end of
memory is reached during continuous Read, then
the address counter ‘wraps-around’ to beginning of
memory, etc. Sequential Read works with either
Immediate Read or Selective Read, the only
difference being that in the latter case the starting
address is intentionally updated.
10
Doc. No. MD-1129 Rev. H
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice

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