ISL6115AEVAL1Z Intersil, ISL6115AEVAL1Z Datasheet
ISL6115AEVAL1Z
Specifications of ISL6115AEVAL1Z
Related parts for ISL6115AEVAL1Z
ISL6115AEVAL1Z Summary of contents
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... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2008, 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ...
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... PART NUMBER (Notes 2, 3) ISL6115AIBZ ISL6115AIBZ-T (Notes 1, ) ISL6115ACBZ ISL6115ACBZ-T (Notes 1, ) ISL6115AEVAL1Z NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...
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Pin Descriptions PIN NO. SYMBOL FUNCTION 1 ISET Current Set 2 ISEN Current Sense 3 GATE External FET Gate Drive Pin 4 VSS Chip Return 5 VDD Chip Supply 6 CTIM Current Limit Timing Capacitor 7 PGOOD Power Good Indicator ...
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... A Thermal Resistance (Typical, Note SOIC Package . . . . . . . . . . . . . . . . . . . DD + 0.3V Maximum Junction Temperature (Plastic Package +150°C DD Maximum Storage Temperature Range . . . -65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = 12V full temperature range, Unless Otherwise Specified SYMBOL TEST CONDITIONS I ISET_ft ...
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Electrical Specifications V PARAMETER CURRENT REGULATION DURATION/POWER GOOD C Charging Current TIM C Fault Pull-Up Current (Note 6) TIM Current Limit Time-Out Threshold Voltage Power Good Pull Down Current NOTES: 6. Parameters with MIN and/or MAX limits are 100% tested ...
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Upon a UV condition, the PGOOD signal will pull low when connected through a resistor to the logic or VDD supply. This pin fault indicator. For an OC latch-off indication, monitor CTIM, pin 6. This pin will ...
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Typical Performance Curves 3.5 3.4 3.3 3.2 3.1 3.0 2.9 2.8 - TEMPERATURE (°C) FIGURE 2. V BIAS CURRENT DD 20.8 20.6 20.4 CTIM - 0V 20.2 20.0 19.8 19.6 19.4 19.2 19.0 18.8 - TEMPERATURE ...
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Typical Performance Curves 8.3 8.2 8.1 8.0 7.9 7.8 7 7.6 7.5 - TEMPERATURE (°C) FIGURE 8. POWER-ON RESET VOLTAGE THRESHOLD PWRON PGOOD VOUT FIGURE 10. ISL6115A TURN-ON ILOAD GATE CTIM FIGURE 12. ...
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... PWRON Disable 9 ISL6115A With R with the 10mΩ sense resistor (R ISL6115AEVAL1Z has a nominal CR level of 2.5~A. The 0.01µF delay time to latch-off capacitor results in a nominal 1ms before latch-off of output after an OC event. Reconfiguring the ISL6115AEVAL1Z board for a higher CR level can be done by changing the R ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries ...