DK-DEV-5M570ZN Altera, DK-DEV-5M570ZN Datasheet - Page 15

• Manufacturer Part Number: DK-DEV-5M570ZN
• Description: KIT DEV MAX V 5M570Z
• Manufacturer: Altera
• Series: MAX® Vr
• Type: CPLDr

Specifications of DK-DEV-5M570ZN

• Contents: Board, Cable(s), Software and Documentation
• Silicon Manufacturer: Altera
• Core Architecture: CPLD
• Core Sub-architecture: MAX
• Silicon Core Number: 5M
• Silicon Family Name: MAX V
• Kit Contents: MAX V CPLD Development Board, USB Cable
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: 5M570ZF256
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2722

Running the Board Test System
January 2011 Altera Corporation
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The kit includes a design example and application called the Board Test System to test
the functionality of the MAX V CPLD development board. The application provides
an easy-to-use interface to alter functional settings and observe the results. You can
use the application to test board components, observe performance, and measure
power usage. The application is also useful as a reference for designing systems. To
install the application, follow the steps in
Kit” on page
The application provides access to the following MAX V CPLD development board
features:
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The application allows you to exercise most of the board components. While using the
application, you reconfigure the CPLD several times with test designs specific to the
functionality you are testing.
Several designs are provided to test the major board features. Each design provides
data for one or more tabs in the application. The Config menu identifies the
appropriate design to download to the CPLD for each tab.
After successful CPLD configuration, the appropriate tab appears and allows you to
exercise the related board features. Highlights appear in the board picture around the
corresponding components.
The Board Test System shares the JTAG bus with other applications like the Nios II
debugger and the SignalTap
connecting to the board, it completely occupies the JTAG bus. If you want to
reconfigure the CPLD through the Quartus II Programmer, be sure to close the BTS
application first.
To run the application, navigate to the
<install dir>\kits\maxv_5m570z_cpld\examples\board_test_system directory and
run the BoardTestSystem.exe application.
On Windows, click Start > All Programs > Altera > MAX V CPLD Development Kit
<version> > Board Test System to run the application.
General purpose I/O (GPIO)
User flash memory (UFM)
Capacitor sense button
User LEDs and push buttons
Replaceable oscillator
Off-chip I
Speaker header
Two DC motor headers
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3–1.
C and SPI EEPROM interfaces
®
II Embedded Logic Analyzer. When the BTS is
“Installing the MAX V CPLD Development
5. Board Test System
MAX V CPLD Development Kit User Guide