MPC8572EAMC Freescale Semiconductor, MPC8572EAMC Datasheet - Page 51

• Manufacturer Part Number: MPC8572EAMC
• Description: MPC8572 AMC RAPID SYSTEM
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8572EAMC

• Contents: Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MPC8572E

5.4.1.3.1
The MPC8572EAMC has a number of headers placed on the board for debug, control, IO and peripheral
functions such as fan cooling and power etc. Header 1 is the COP/JTAG interface used for debug and
control of the main MPC8572E processor.
The MPC8572EAMC has a second 10-pin JTAG interface that is used for controlling the CPLD logic. This
interface is detailed in
Freescale Semiconductor
Pin #
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
TDO
NC
TDI
TRST#
+3.3 V
+3.3 V
TCLK
CHK_STP_IN#
TMS
NC
SRESET#
NC
HRESET#
NC
CHK_STP_OUT# Check Stop Out. This pin is pulled up to 3.3 V via a 10 k resistor
GND
Pin #
MPC8572EAMC Board Headers
1
2
3
4
5
6
7
8
Signal
TCLK
NC
TMS
GND
TDI
VCC
TDO
GND
Signal
Table
MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2
Table 5-18. HD1—Reset/System CPLD JTAG Interface
Transmit data out—MPC8572E’s JTAG serial data output pin
No Connect
Transmit Data in - MPC8572E’s JTAG serial data input pin
Test Port Reset. Used to reset the JTAG logic on the MPC8572E
+3.3 V Power
+3.3 V Power
Test Port Clock. This clock is used to shift data in/out of the MPC8572E’s JTAG logic
Check Stop In. This pin is pulled up to 3.3 V via a 10 k resistor
Test Mode Select. This pin is used to change the state of the JTAG machine
No Connect
Soft Reset. The MPC8572E’s soft reset signal
No Connect
Hard Reset. The MPC8572E’s hard reset signal
No Connect
Digital ground
Test port clock. This clock is used to shift data in/out of the CPLD’s JTAG logic.
No Connect
Test Mode Select. This pin is used to change the state of the JTAG machine
Digital Ground
Transmit Data in—CPLD’s JTAG serial data input pin
+3.3 V Power
Transmit Data Out—CPLD’s JTAG serial data output pin
Digital Ground
5-18.
Table 5-17. J6—MPC8572E COP/JTAG Interface
Table 5-17
details the configuration of this header.
Description
Description
MPC8572EAMC Functional Description
5-27