DC1437B-AB Linear Technology, DC1437B-AB Datasheet - Page 17

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DC1437B-AB

Manufacturer Part Number
DC1437B-AB
Description
BOARD EVAL LTM9003-AB
Manufacturer
Linear Technology
Type
Pre-Distortion Receiver Subsystemr
Datasheets

Specifications of DC1437B-AB

Design Resources
DC1437 Schematic
Frequency
184MHz
Features
LTM9003 12bit Predistortion Receiver Subsystem, LVDS Output
Tool / Board Applications
Wireless Connectivity-ZigBee, RF, Infrared, USB
Mcu Supported Families
LTM9003
Development Tool Type
Hardware - Eval/Demo Board
For Use With/related Products
LTM9003
Lead Free Status / RoHS Status
Not applicable / Not applicable
applicaTions inForMaTion
Table 2b. LO Input Impedance vs Frequency (LTM9003-AB)
FREQUENCY
Figure 7. LO Input Return Loss with and without Matching
(MHz)
1000
1100
1200
1300
1400
1500
1600
1700
1800
1900
2000
2100
2200
2300
2400
2500
2600
2700
2800
2900
3000
500
600
700
800
900
–10
–15
–25
–30
–20
–5
0
100
INPUT IMPEDANCE
14.3 – j7.5
12.6 – j2.4
15.8 + j1.9
22.7 + j4.1
32.5 + j3.8
44.2 + j1.3
56.3 – j1.2
69.9 + j3.1
61.8 + j3.3
58.1 + j2.4
54.9 + j1.5
52.7 + j0.8
50.7 + j0.2
49.4 – j0.2
47.8 – j0.5
46.7 – j0.7
45.7 – j0.8
45.5 – j0.7
46.4 – j0.4
48.7 – j0.1
50.9 + j0.1
52.9 + j0.3
54.6 + j0.5
66 – j1.3
70.7 + j1
66 + j3.7
NO MATCHING
(2.7nH + 0.5pF)
FREQUENCY (MHz)
ELEMENTS
2GHz MATCH
1000
600MHz MATCH
(6.8nH + 5.6pF)
MAG
0.68
0.61
0.53
0.44
0.35
0.25
0.18
0.15
0.18
0.21
0.25
0.27
0.28
0.29
0.28
0.28
0.27
0.25
0.23
0.17
0.13
0.09
0.09
0.11
0.2
0.1
9003 F07
10000
S11
–150.6
–170.4
–103.3
–106.8
–107.1
ANGLE
170.8
151.5
130.2
104.9
–12.8
–37.8
–54.1
–65.5
–73.4
–79.8
–84.2
–88.5
–91.4
–95.5
–98.9
–97.9
–84.2
–72.5
–66.7
70.3
26.4
Mixer Enable Interface
The voltage necessary to turn on the mixer is 2.7V. To dis-
able the mixer, the enable voltage must be less than 0.3V.
If the MIX_EN pin is allowed to float, the mixer will tend
to remain in its last operating state. Thus it is not recom-
mended that the enable function be used in this manner.
If the shutdown function is not required, then the MIX_EN
pin should be connected directly to V
Amplifier Enable Interface
The AMP_EN pin self-biases to V
tor. The pin must be pulled below 0.8V in order to disable
the amplifier.
Driving the ADC Clock Input
The noise performance of the ADC can depend on the
encode signal quality as much as on the analog input. The
ENC
primarily for noise immunity from common mode noise
sources. Each input is biased through a 4.8k resistor to
a 1.5V bias. The bias resistors set the DC operating point
for transformer coupled drive circuits and can set the logic
threshold for single-ended drive circuits.
Any noise present on the encode signal will result in ad-
ditional aperture jitter that will be RMS summed with the
inherent ADC aperture jitter.
In applications where jitter is critical (high input frequen-
cies) take the following into consideration:
1. Differential drive should be used.
2. Use as large an amplitude as possible; if transformer
3. If the ADC is clocked with a sinusoidal signal, filter the
4. Balance the capacitance and series resistance at both
coupled use a higher turns ratio to increase the
amplitude.
encode signal to reduce wideband noise.
encode inputs so that any coupled noise will appear at
both inputs as common mode noise. The encode inputs
have a common mode range of 1.2V to 2.0V. Each input
may be driven from ground to V
drive.
+
/ENC
inputs are intended to be driven differentially,
CC2
through a 30k resis-
DD
CC1
LTM9003
for single-ended
.

9003f

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