DC1398A-GA Linear Technology, DC1398A-GA Datasheet - Page 18

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DC1398A-GA

Manufacturer Part Number
DC1398A-GA
Description
BOARD EVAL LTM9001-GA
Manufacturer
Linear Technology
Type
Baseband Receiverr
Datasheets

Specifications of DC1398A-GA

Design Resources
Demo Circuit 1398A Schematic
Frequency
0Hz ~ 300MHz
Kit Contents
Board, Manual
Features
LTM9001 16bit Receiver Subsystem, DC-10MHz LPF
Tool / Board Applications
Wireless Connectivity-ZigBee, RF, Infrared, USB
Development Tool Type
Hardware - Eval/Demo Board
Mcu Supported Families
LTM9001
For Use With/related Products
LTM9001
Lead Free Status / RoHS Status
Not applicable / Not applicable
APPLICATIONS INFORMATION
LTM9001-GA
As with all high speed/high resolution converters, the
digital output loading can affect the performance. The
digital outputs of the LTM9001 should drive a minimum
capacitive load to avoid possible interaction between the
digital outputs and sensitive input circuitry. The output
should be buffered with a device such as an ALVCH16373
CMOS latch. For full speed operation the capacitive load
should be kept under 10pF. A resistor in series with the
output may be used but is not required since the ADC has
a series resistor of 43Ω on chip.
Lower OV
from the digital outputs.
Data Format
The LTM9001 parallel digital output can be selected for
offset binary or 2’s complement format. The format is
selected with the MODE pin. This pin has a four level
logic input, centered at 0, 1/3V
external resistive divider can be used to set the 1/3V
and 2/3V
for the MODE pin.
Table 5. MODE Pin Function
Overfl ow Bit
An overfl ow output bit (OF) indicates when the converter
is over-ranged or under-ranged. A logic high on the OF
pin indicates an overfl ow or underfl ow.
18
0V(GND)
1/3V
2/3V
MODE
V
DD
DD
DD
DD
DD
OUTPUT FORMAT
2’s Complement
2’s Complement
logic levels. Table 5 shows the logic states
Offset Binary
Offset Binary
voltages will also help reduce interference
CLOCK DUTY CYCLE STABILIZER
DD
, 2/3V
Off
Off
DD
On
On
and V
DD
. An
DD
Figure 10. Functional Equivalent of Digital Output Randomizer
RANDOMIZER
RAND = HIGH,
Figure 11. Derandomizing a Randomized Digital Output
PC BOARD
ENABLED
LTM9001-GA
D0
RAND
LTM9001-GA
D15
D14
D2
D1
CLKOUT
CLKOUT
OF
D0
D15
D14
D0
D0
D2
D1
D0
D0
OF
FPGA
9001-GA F12
D15
D14
D2
D1
D0
CLKOUT
OF
D15/D0
D14/D0
D2/D0
D1/D0
D0
9001-GA F13
9001gaf

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