CS8415A-CS Cirrus Logic Inc, CS8415A-CS Datasheet - Page 17

• Manufacturer Part Number: CS8415A-CS
• Description: IC, DIGITAL AUDIO RECEIVER, SOIC-28
• Manufacturer: Cirrus Logic Inc

Specifications of CS8415A-CS

• Audio Control Type: Digital
• Control Interface: I2C, Serial
• Control / Process Application: AV & DVD Receivers, CD-R, Digital Mixing Consoles
• Supply Voltage Range: 2.85V To 5.5V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

6. CONTROL PORT DESCRIPTION
The control port is used to access the registers, al-
lowing the CS8415A to be configured for the de-
sired operational modes and formats. In addition,
Channel Status and User data may be read through
the control port. The operation of the control port
may be completely asynchronous with respect to
the audio sample rates. However, to avoid potential
interference problems, the control port pins should
remain static if no operation is required.
The control port has 2 modes: SPI and Two-Wire,
with the CS8415A acting as a slave device. SPI
mode is selected if there is a high to low transition
on the AD0/CS pin, after the RST pin has been
brought high. Two-Wire mode is selected by con-
necting the AD0/CS pin to VL+ or DGND, thereby
permanently selecting the desired AD0 bit address
state.
6.1
In SPI mode, CS is the CS8415A chip select signal,
CCLK is the control port bit clock (input into the
CS8415A from the microcontroller), CDIN is the
input data line from the microcontroller, CDOUT is
the output data line to the microcontroller. Data is
DS470PP3
C C L K
CS
C D IN
C D O U T
AND TIMING
SPI Mode
ADDRESS
MAP = Memory Address Pointer, 8 bits, MSB first
0010000
C H IP
High Impedance
R/W
M A P
Figure 10. Control Port Timing in SPI Mode
MSB
b y te 1
DATA
b y te n
LSB
clocked in on the rising edge of CCLK and out on
the falling edge.
Figure 10 shows the operation of the control port in
SPI mode. To write to a register, bring CS low. The
first seven bits on CDIN form the chip address and
must be 0010000. The eighth bit is a read/write in-
dicator (R/W), which should be low to write. The
next eight bits form the Memory Address Pointer
(MAP), which is set to the address of the register
that is to be updated. The next eight bits are the data
which will be placed into the register designated by
the MAP. During writes, the CDOUT output stays
in the Hi-Z state. It may be externally pulled high
or low with a 47 KΩ resistor, if desired.
There is a MAP auto increment capability, enabled
by the INCR bit in the MAP register. If INCR is a
zero, the MAP will stay constant for successive
read or writes. If INCR is set to a 1, the MAP will
autoincrement after each byte is read or written, al-
lowing block reads or writes of successive regis-
ters.
To read a register, the MAP has to be set to the cor-
rect address by executing a partial write cycle
which finishes (CS high) immediately after the
MAP byte. The MAP auto increment bit (INCR)
may be set or not, as desired. To begin a read, bring
A D D R E S S
C H IP
0010000
R/W
MSB
LSB MSB
CS8415A
LSB
17