PCA9624PW NXP Semiconductors, PCA9624PW Datasheet - Page 11
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PCA9624PW
Manufacturer Part Number
PCA9624PW
Description
IC, LED DRIVER, RGBA, 24-TSSOP
Manufacturer
NXP Semiconductors
Datasheet
1.PCA9624BS118.pdf
(37 pages)
Specifications of PCA9624PW
No. Of Outputs
8
Output Current
100mA
Output Voltage
40V
Input Voltage
2.3V To 5.5V
Dimming Control Type
PWM
Driver Case Style
TSSOP
Switching Frequency
1MHz
Base Number
9624
Operating
RoHS Compliant
Led Driver Application
RGB Or RGBA LED Drivers, LED Status Information, Displays, Backlights
Rohs Compliant
Yes
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NXP Semiconductors
PCA9624_2
Product data sheet
7.3.3 PWM0 to PWM7, individual brightness control
7.3.4 GRPPWM, group duty cycle control
Table 7.
Legend: * default value.
A 97 kHz fixed frequency signal is used for each output. Duty cycle is controlled through
256 linear steps from 00h (0 % duty cycle = LED output off) to FFh
(99.6 % duty cycle = LED output at maximum brightness). Applicable to LED outputs
programmed with LDRx = 10 or 11 (LEDOUT0 to LEDOUT3 registers).
Table 8.
Legend: * default value
When DMBLNK bit (MODE2 register) is programmed with logic 0, a 190 Hz fixed
frequency signal is superimposed with the 97 kHz individual brightness control signal.
GRPPWM is then used as a global brightness control allowing the LED outputs to be
dimmed with the same value. The value in GRPFREQ is then a ‘Don’t care’.
General brightness for the 16 outputs is controlled through 256 linear steps from 00h
(0 % duty cycle = LED output off) to FFh (99.6 % duty cycle = maximum brightness).
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3
registers).
When DMBLNK bit is programmed with logic 1, GRPPWM and GRPFREQ registers
define a global blinking pattern, where GRPFREQ contains the blinking period (from
24 Hz to 10.73 s) and GRPPWM the duty cycle (ON/OFF ratio in %).
duty cycle
duty cycle
Address
02h
03h
04h
05h
06h
07h
08h
09h
Address
0Ah
Register Bit
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
PWM0 to PWM7 - PWM registers 0 to 7 (address 02h to 09h) bit description
GRPPWM - Group brightness control register (address 0Ah) bit description
Register
GRPPWM
=
=
-------------------------- -
GDC 7:0
-------------------------- -
IDCx 7:0
256
256
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
Rev. 02 — 26 August 2009
Bit
7:0
Symbol
IDC0[7:0]
IDC1[7:0]
IDC2[7:0]
IDC3[7:0]
IDC4[7:0]
IDC5[7:0]
IDC6[7:0]
IDC7[7:0]
Symbol
GDC[7:0]
Access Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Access Value
R/W
8-bit Fm+ I
0000 0000* PWM0 Individual Duty Cycle
0000 0000* PWM1 Individual Duty Cycle
0000 0000* PWM2 Individual Duty Cycle
0000 0000* PWM3 Individual Duty Cycle
0000 0000* PWM4 Individual Duty Cycle
0000 0000* PWM5 Individual Duty Cycle
0000 0000* PWM6 Individual Duty Cycle
0000 0000* PWM7 Individual Duty Cycle
1111 1111
2
C-bus 100 mA 40 V LED driver
Description
Description
GRPPWM register
PCA9624
© NXP B.V. 2009. All rights reserved.
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