EPF8282ALC84-4N Altera, EPF8282ALC84-4N Datasheet - Page 6

• Manufacturer Part Number: EPF8282ALC84-4N
• Description: IC, PLD, 208 MACROCELL, 60MHZ, PLCC-84
• Manufacturer: Altera
• Series: FLEX 8Kr

Specifications of EPF8282ALC84-4N

• No. Of Macrocells: 208
• No. Of I/o's: 64
• Global Clock Setup Time: 1.2ns
• Frequency: 60MHz
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Family Name: FLEX 8000
• Number Of Usable Gates: 2500
• Number Of Logic Blocks/elements: 208
• # Registers: 282
• # I/os (max): 78
• Frequency (max): 125MHz
• Process Technology: CMOS
• Operating Supply Voltage (typ): 5V
• Logic Cells: 208
• Device System Gates: 2500
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 84
• Package Type: PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FLEX 8000 Programmable Logic Device Family Data Sheet
Figure 2. FLEX 8000 Logic Array Block
6
LAB Local
Interconnect
(32 channels)
LAB Control
Signals
24
Logic Array Block
A logic array block (LAB) consists of eight LEs, their associated carry and
cascade chains, LAB control signals, and the LAB local interconnect. The
LAB provides the coarse-grained structure of the FLEX 8000 architecture.
This structure enables FLEX 8000 devices to provide efficient routing,
high device utilization, and high performance.
diagram of the FLEX 8000 LAB.
4
4
4
4
4
4
4
4
4
8
Dedicated
Inputs
4
4
Carry-In and
Cascade-In
from LAB
on Left
LE1
LE2
LE3
LE4
LE5
LE6
LE7
LE8
Row Interconnect
2
2
Carry-Out and
Cascade-Out
to LAB on Right
8
8
16
Figure 2
Column-to-Row
Interconnect
Column
Interconnect
See Figure 8
for details.
Altera Corporation
shows a block