PIC16F1827-I/MQ Microchip Technology, PIC16F1827-I/MQ Datasheet - Page 94

• Manufacturer Part Number: PIC16F1827-I/MQ
• Description: IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
• Manufacturer: Microchip Technology

Specifications of PIC16F1827-I/MQ

• Controller Family/series: PIC16F
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 384Byte
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI
• Core Size: 8 Bit
• Program Memory Size: 4 Kwords
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Data Ram Size: 384 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN EP
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / Rohs Status: Details

PIC16F/LF1826/27
8.5.6
The PIR1 register contains the interrupt flag bits, as
shown in Register 8-6.
REGISTER 8-6:
DS41391B-page 94
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
TMR1GIF
R/W-0/0
PIR1 REGISTER
TMR1GIF: Timer1 Gate Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
ADIF: A/D Converter Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
RCIF: USART Receive Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TXIF: USART Transmit Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
SSP1IF: Synchronous Serial Port 1 (MSSP1) Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CCP1IF: CCP1 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TMR2IF: Timer2 to PR2 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TMR1IF: Timer1 Overflow Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
R/W-0/0
ADIF
PIR1: PERIPHERAL INTERRUPT REQUEST REGISTER 1
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R-0/0
RCIF
R-0/0
TXIF
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
SSP1IF
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
R/W-0/0
CCP1IF
software
© 2009 Microchip Technology Inc.
R/W-0/0
TMR2IF
should
ensure
R/W-0/0
TMR1IF
bit 0
the