LPC1225FBD48/321 NXP Semiconductors, LPC1225FBD48/321 Datasheet - Page 21

• Manufacturer Part Number: LPC1225FBD48/321
• Description: MCU, 80K FLASH, CORTEX-M0, 48LQFP
• Manufacturer: NXP Semiconductors

Specifications of LPC1225FBD48/321

• Rohs Compliant: YES
• Featured Product: LPC122x Cortex-M0 Microcontrollers
• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 45MHz
• Connectivity: I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 39
• Program Memory Size: 80KB (80K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Controller Family/series: LPC1200
• No. Of I/o's: 39
• Ram Memory Size: 8KB
• Cpu Speed: 30MHz
• No. Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-5158; LPC1225FBD48/321

NXP Semiconductors
LPC122X
Objective data sheet
7.13.1 Features
7.14.1 Features
7.13 10-bit ADC
7.14 Comparator block
The LPC122x contains one ADC. It is a single 10-bit successive approximation ADC with
eight channels.
The comparator block consists of two analog comparators.
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Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I
The I
10-bit successive approximation ADC.
Input multiplexing among 8 pins.
Power-down mode.
Measurement range 0 V to V
10-bit conversion time of 257 kHz.
Burst conversion mode for single or multiple inputs.
Optional conversion on transition of input pin or counter/timer match signal.
Individual result registers for each ADC channel to reduce interrupt overhead.
Up to six selectable external sources per comparator; fully configurable on either
positive or negative comparator input channels.
BOD 0.9 V internal reference voltage selectable on both comparators; configurable on
either positive or negative comparator input channels.
32-stage Voltage Ladder internal reference voltage selectable on both comparators;
configurable on either positive or negative comparator input channels.
Voltage ladder source voltage is selectable from an external pin or an internal 3.3 V
voltage rail if external power source is not available.
Voltage ladder can be separately powered down for applications only requiring the
comparator function.
Relaxation oscillator circuitry output for a feedback 555-style timer application.
Common interrupt connected to NVIC.
Comparator outputs selectable as synchronous or asynchronous.
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C-bus can be used for test and diagnostic purposes.
C-bus controller supports multiple address recognition and a bus monitor mode.
All information provided in this document is subject to legal disclaimers.
Rev. 1.2 — 29 March 2011
DD(3V3)
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32-bit ARM Cortex-M0 microcontroller
LPC122x
© NXP B.V. 2011. All rights reserved.
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