SAF-XC886CM-8FFI Infineon Technologies, SAF-XC886CM-8FFI Datasheet - Page 87

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SAF-XC886CM-8FFI

Manufacturer Part Number
SAF-XC886CM-8FFI
Description
MCU, 8BIT, 32K FLASH, 5V, XC800, 48TQFP
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAF-XC886CM-8FFI

Controller Family/series
XC800
Ram Memory Size
1792Byte
No. Of Timers
4
No. Of Pwm Channels
4
Digital Ic Case Style
TQFP
Core Size
8bit
Program Memory Size
32KB
Peripherals
ADC, PWM, Timer

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3.10
The Watchdog Timer (WDT) provides a highly reliable and secure way to detect and
recover from software or hardware failures. The WDT is reset at a regular interval that is
predefined by the user. The CPU must service the WDT within this interval to prevent the
WDT from causing an XC886/888 system reset. Hence, routine service of the WDT
confirms that the system is functioning properly. This ensures that an accidental
malfunction of the XC886/888 will be aborted in a user-specified time period.
In debug mode, the WDT is default suspended and stops counting. Therefore, there is
no need to refresh the WDT during debugging.
Features
The WDT is a 16-bit timer incremented by a count rate of
timer is realized as two concatenated 8-bit timers. The upper 8 bits of the WDT can be
preset to a user-programmable value via a watchdog service access in order to modify
the watchdog expire time period. The lower 8 bits are reset on each service access.
Figure 28
Figure 28
Data Sheet
ENWDT
ENWDT_P
16-bit Watchdog Timer
Programmable reload value for upper 8 bits of timer
Programmable window boundary
Selectable input frequency of
Time-out detection with NMI generation and reset prewarning activation (after which
a system reset will be performed)
f
PCLK
shows the block diagram of the WDT unit.
Watchdog Timer
Logic
WDT Block Diagram
1:128
1:2
f
PCLK
WDTIN
/2 or
MUX
80
f
PCLK
/128
WDT Low Byte
Control
WDT
Overflow/Time-out Control &
Window-boundary control
Clear
f
PCLK
/2 or
Functional Description
WDT High Byte
WDTWINB
WDTREL
f
PCLK
XC886/888CLM
/128. This 16-bit
V1.2, 2009-07
FNMIWDT
WDTRST
.

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