SAF-XC886CM-8FFI Infineon Technologies, SAF-XC886CM-8FFI Datasheet - Page 97

• Manufacturer Part Number: SAF-XC886CM-8FFI
• Description: MCU, 8BIT, 32K FLASH, 5V, XC800, 48TQFP
• Manufacturer: Infineon Technologies

Specifications of SAF-XC886CM-8FFI

• Controller Family/series: XC800
• Ram Memory Size: 1792Byte
• No. Of Timers: 4
• No. Of Pwm Channels: 4
• Digital Ic Case Style: TQFP
• Core Size: 8bit
• Program Memory Size: 32KB
• Peripherals: ADC, PWM, Timer

XC886/888CLM
Functional Description
needed for the handshaking between the master and slave tasks is provided by the
master task through the header portion of the frame.
The header consists of a break and synch pattern followed by an identifier. Among these
three fields, only the break pattern cannot be transmitted as a normal 8-bit UART data.
The break must contain a dominant value of 13 bits or more to ensure proper
synchronization of slave nodes.
In the LIN communication, a slave task is required to be synchronized at the beginning
of the protected identifier field of frame. For this purpose, every frame starts with a
sequence consisting of a break field followed by a synch byte field. This sequence is
unique and provides enough information for any slave task to detect the beginning of a
new frame and be synchronized at the start of the identifier field.
Upon entering LIN communication, a connection is established and the transfer speed
(baud rate) of the serial communication partner (host) is automatically synchronized in
the following steps:
STEP 1: Initialize interface for reception and timer for baud rate measurement
STEP 2: Wait for an incoming LIN frame from host
STEP 3: Synchronize the baud rate to the host
STEP 4: Enter for Master Request Frame or for Slave Response Frame
Note: Re-synchronization and setup of baud rate are always done for every Master
Request Header or Slave Response Header LIN frame.
Data Sheet
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V1.2, 2009-07