COP8SGE744V8 National Semiconductor, COP8SGE744V8 Datasheet - Page 26

• Manufacturer Part Number: COP8SGE744V8
• Description: IC, 8BIT MCU, COP8, 15MHZ, LCC-44
• Manufacturer: National Semiconductor

Specifications of COP8SGE744V8

• Controller Family/series: COP8
• No. Of I/o's: 40
• Ram Memory Size: 256Byte
• Cpu Speed: 15MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 6
• Digital Ic Case Style: LCC
• Core Size: 8 Bit
• Program Memory Size: 8KB
• Embedded Interface Type: SPI, USART
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

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7.0 Power Saving Features
7.2 IDLE MODE
The device is placed in the IDLE mode by writing a “1” to the
IDLE flag (G6 data bit). In this mode, all activities, except the
associated on-board oscillator circuitry and the IDLE Timer
T0, are stopped.
As with the HALT mode, the device can be returned to
normal operation with a reset, or with a Multi-Input Wakeup
from the L Port. Alternately, the microcontroller resumes
normal operation from the IDLE mode when the twelfth bit
(representing 4.096 ms at internal clock frequency of
10 MHz, t
This toggle condition of the twelfth bit of the IDLE Timer T0 is
latched into the T0PND pending flag.
The user has the option of being interrupted with a transition
on the twelfth bit of the IDLE Timer T0. The interrupt can be
enabled or disabled via the T0EN control bit. Setting the
T0EN flag enables the interrupt and vice versa.
C
= 1 µs) of the IDLE Timer toggles.
FIGURE 18. Wakeup from HALT
FIGURE 19. Wakeup from IDLE
(Continued)
26
The user can enter the IDLE mode with the Timer T0 inter-
rupt enabled. In this case, when the T0PND bit gets set, the
device will first execute the Timer T0 interrupt service routine
and then return to the instruction following the “Enter Idle
Mode” instruction.
Alternatively, the user can enter the IDLE mode with the
IDLE Timer T0 interrupt disabled. In this case, the device will
resume normal operation with the instruction immediately
following the “Enter IDLE Mode” instruction.
Note: It is necessary to program two NOP instructions following both the set
HALT mode and set IDLE mode instructions. These NOP instructions
are necessary to allow clock resynchronization following the HALT or
IDLE modes.
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