PIC16F1826-I/MQ Microchip Technology, PIC16F1826-I/MQ Datasheet - Page 132

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PIC16F1826-I/MQ

Manufacturer Part Number
PIC16F1826-I/MQ
Description
IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC16F1826-I/MQ

Controller Family/series
PIC16F
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
32MHz
No. Of Timers
3
Interface
EUSART, I2C, SPI
Core Size
8 Bit
Program Memory Size
2kWords
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F/LF1826/27
REGISTER 13-1:
REGISTER 13-2:
REGISTER 13-3:
DS41391B-page 132
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
R/W/HS-0/0
R/W-0/0
IOCBP7
R/W-0/0
IOCBN7
IOCBF7
IOCBP<7:0>: Interrupt-on-Change Positive Edge Enable bits
1 = Interrupt-on-change enabled on the pin for a positive going edge. Associated Status bit and
0 = Interrupt-on-change disabled for the associated pin
IOCBN<7:0>: Interrupt-on-Change Negative Edge Enable bits
1 = Interrupt-on-change enabled on the pin for a negative going edge. Associated Status bit and
0 = Interrupt-on-change disabled for the associated pin
IOCBF<7:0>: Interrupt-on-Change Flag bits
1 = An enabled change was detected on the associated pin.
0 = No change was detected, or the user cleared the detected change.
R/W/HS-0/0
R/W-0/0
IOCBP6
R/W-0/0
IOCBN6
IOCBF6
Set when IOCBPx = 1 and a rising edge was detected on RBx, or when IOCBNx = 1 and a falling
edge was detected on RBx.
interrupt flag will be set upon detecting an edge.
interrupt flag will be set upon detecting an edge.
IOCBP: INTERRUPT-ON-CHANGE POSITIVE EDGE REGISTER
IOCBN: INTERRUPT-ON-CHANGE NEGATIVE EDGE REGISTER
IOCBF: INTERRUPT-ON-CHANGE FLAG REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W/HS-0/0 R/W/HS-0/0 R/W/HS-0/0
R/W-0/0
IOCBP5
R/W-0/0
IOCBN5
IOCBF5
R/W-0/0
IOCBP4
R/W-0/0
IOCBN4
IOCBF4
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
HS = Bit is set by hardware
IOCBP3
IOCBN3
R/W-0/0
R/W-0/0
IOCBF3
R/W/HS-0/0
IOCBN2
R/W-0/0
IOCBP2
R/W-0/0
IOCBF2
© 2009 Microchip Technology Inc.
R/W/HS-0/0
IOCBN1
R/W-0/0
IOCBP1
R/W-0/0
IOCBF1
R/W/HS-0/0
R/W-0/0
IOCBP0
R/W-0/0
IOCBN0
IOCBF0
bit 0
bit 0
bit 0

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