P89LPC9401FBD NXP Semiconductors, P89LPC9401FBD Datasheet - Page 31
![IC, MCU 8BIT 80C51, LCD DRIVER, SMD](/photos/19/1/190186/ge64lqfp05-40_sml.jpg)
P89LPC9401FBD
Manufacturer Part Number
P89LPC9401FBD
Description
IC, MCU 8BIT 80C51, LCD DRIVER, SMD
Manufacturer
NXP Semiconductors
Datasheet
1.P89LPC9401FBD551.pdf
(59 pages)
Specifications of P89LPC9401FBD
Controller Family/series
(8051) 8052
Core Size
8bit
No. Of I/o's
23
Program Memory Size
8KB
Ram Memory Size
256Byte
Cpu Speed
18MHz
Oscillator Type
External, Internal
No. Of Timers
4
No.
RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P89LPC9401FBD
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
P89LPC9401FBD,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Company:
Part Number:
P89LPC9401FBD,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Company:
Part Number:
P89LPC9401FBDЈ¬551
Manufacturer:
NXP
Quantity:
3 048
Philips Semiconductors
P89LPC9401_1
Preliminary data sheet
Fig 11. SPI block diagram
SPI STATUS REGISTER
BY 4, 16, 64, 128
CPU clock
DIVIDER
SELECT
SPI CONTROL
7.21 SPI
The P89LPC9401 provides another high-speed serial communication interface—the SPI
interface. SPI is a full-duplex, high-speed, synchronous communication bus with two
operation modes: Master mode and Slave mode. Up to 4.5 Mbit/s can be supported in
Master mode or up to 3 Mbit/s in Slave mode. It has a transfer completion flag and write
collision flag protection.
The SPI interface has three pins: SPICLK, MOSI, MISO and SS:
Typical connections are shown in
•
SPICLK, MOSI and MISO are typically tied together between two or more SPI
devices. Data flows from master to slave on MOSI (Master Out Slave In) pin and flows
from slave to master on MISO (Master In Slave Out) pin. The SPICLK signal is output
in the master mode and is input in the slave mode. If the SPI system is disabled, i.e.,
SPEN (SPCTL.6) = 0 (reset value), these pins are configured for port functions.
interrupt
request
SPI clock (master)
SPI
MSTR
SPEN
8-bit two-clock 80C51 microcontroller with 32 segment
Rev. 01 — 5 September 2005
internal
data
bus
SPI CONTROL REGISTER
8-BIT SHIFT REGISTER
READ DATA BUFFER
CLOCK LOGIC
Figure 12
clock
through
Figure
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
14.
P89LPC9401
M
M
M
S
S
S
CONTROL
LOGIC
PIN
002aab466
4 LCD driver
MISO
P2.3
MOSI
P2.2
SPICLK
P2.5
31 of 59