CDB4350 Cirrus Logic Inc, CDB4350 Datasheet - Page 21

• Manufacturer Part Number: CDB4350
• Description: Eval Bd 105dB 192kHz DAC W/PLL
• Manufacturer: Cirrus Logic Inc

Specifications of CDB4350

• Number Of Dac's: 2
• Number Of Bits: 24
• Outputs And Type: 2, Differential
• Sampling Rate (per Second): 192k
• Data Interface: Serial
• Dac Type: Voltage
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: CS4350
• Description/function: Audio D/A
• Operating Supply Voltage: 12 V
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: CS4350
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
• Other names: 598-1517

DS691F1
4.4
4.5
4.6
4.6.1
De-Emphasis
The device includes on-chip digital de-emphasis.
44.1 kHz. The frequency response of the de-emphasis curve will scale proportionally with changes in sam-
ple rate, Fs.
Mute Control
The mute control pins (AMUTEC and BMUTEC) go active during power-up initialization, reset, muting (see
Section
to prevent the clicks and pops that can occur in any single-ended single-supply system.
Use of the mute control function is not mandatory but recommended for designs requiring the absolute min-
imum in extraneous clicks and pops. Also, use of the Mute Control function can enable the system designer
to achieve idle-channel noise and signal-to-noise ratios which are only limited by the external mute circuit.
Recommended Power-Up Sequence
Note:
Stand-Alone Mode
1. Hold RST low until the power supplies and configuration pins are stable, and the master and left/right
2. Bring RST high. The device will remain in a low power state with VQ low for approximately 512 LRCK
3. The device will then initiate the power up sequence which lasts approximately 50 µs when the
clocks are fixed to the appropriate frequencies, as discussed in
port registers are reset to their default settings, VQ will remain low, and VBIAS will be connected to
VA.
cycles in Single-Speed Mode (1024 LRCK cycles in Double-Speed Mode, and 2048 LRCK cycles in
Quad-Speed Mode).
Popguard is disabled. If the Popguard is enabled, see
power-up timing.
8.4.3), and loss of LRCK. These pins are intended to be used as control for external mute circuits
De-emphasis is only available in Single-Speed Mode.
-10dB
Gain
0dB
dB
Figure 16. De-Emphasis Curve
3.183 kHz
T1=50 µs
F1
Figure 16
10.61 kHz
F2
shows the de-emphasis curve for Fs equal to
Section 4.7
T2 = 15 µs
Frequency
Section
for a complete description of
4.2. In this state, the control
CS4350
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