CS4340-KS Cirrus Logic Inc, CS4340-KS Datasheet - Page 12

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CS4340-KS

Manufacturer Part Number
CS4340-KS
Description
D/A Converter (D-A) IC
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CS4340-KS

Resolution (bits)
24bit
Data Interface
Serial
No. Of Pins
16
Update Rate
96kSPS
Mounting Type
Surface Mount
Peak Reflow Compatible (260 C)
No
Supply Voltage Max
5V
No. Of Bits
24 Bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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12
SWITCHING CHARACTERISTICS - INTERNAL SERIAL CLOCK
Notes: 6. The Duty Cycle must be 50% +/− 1/2 MCLK Period.
MCLK Frequency
MCLK Duty Cycle
Input Sample Rate
LRCK Duty Cycle
SCLK Period
SCLK rising to LRCK edge
SDATA valid to SCLK rising setup time
SCLK rising to SDATA hold time
SCLK rising to SDATA hold time
7. See section 4.2.1 for derived internal frequencies.
Parameters
MCLK / LRCK = 512, 256 or 128
*
The SCLK pulses shown are internal to the CS4340. N equals MCLK divided by SCLK
MCLK / LRCK = 384 or 192
*INTERNAL SCLK
*INTERNAL SCLK
Figure 12. Internal Serial Mode Input Timing
Double-Speed Mode
Figure 13. Internal Serial Clock Generation
Single-Speed Mode
*
The SCLK pulses shown are internal to the CS4340.
SDATA
SDATA
MCLK
LRCK
LRCK
(Note 7)
Symbol
1
t
t
t
sclkw
t
t
sclkr
sdlrs
Fs
Fs
sdh
sdh
t
t
sclkr
sdlrs
N
2
t
sdh
--------------------- -
(
--------------------- -
(
--------------------- -
(
512
512
384
--------------- -
SCLK
1.024
1
1
1
Min
)Fs
)Fs
)Fs
45
50
1
4
-
t
sclkw
+
+
+
10
15
15
(Note 6)
N
t
------------- -
Typ
sclkw
2
-
-
-
-
-
-
-
-
Max
25.6
100
55
50
-
-
-
-
-
CS4340
DS297F3
Units
MHz
kHz
kHz
ns
ns
ns
%
%
s
s

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