CS47048C-DQZ Cirrus Logic Inc, CS47048C-DQZ Datasheet

IC 4ch ADC 8ch DAC & Single Core 32-bit DSP Audio SoC (300M MACs)

CS47048C-DQZ

Manufacturer Part Number
CS47048C-DQZ
Description
IC 4ch ADC 8ch DAC & Single Core 32-bit DSP Audio SoC (300M MACs)
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS47048C-DQZ

Operating Temperature Range
-40°C To +85°C
No. Of Pins
100
Peak Reflow Compatible (260 C)
Yes
Frequency
147MHz
Embedded Interface Type
I2C, SPI
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Core Supply Voltage
1.89V
Digital Ic Case Style
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS47048C-DQZ
Manufacturer:
MURATA
Quantity:
1 200
Part Number:
CS47048C-DQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
“†”
See
FEATURES
Preliminary Product Information
Cost-effective, High-performance 32-bit DSP
— 300,000,000 MAC/S (multiply accumulates per second)
— Dual MAC cycles per clock
— 72-bit accumulators are the highest precision in the industry
— 32K x 32-bit SRAM with three 2K blocks assignable to either
Integrated DAC & ADC Functionality
— 8
— 4
— Integrated 5:1 analog mux feeds one stereo ADC
Configurable Serial Audio Inputs/Outputs
— Integrated 192 kHz S/PDIF Rx
— Integrated 192 kHz S/PDIF Tx
— Supports 32-bit Serial Data @ 192 kHz
— Supports 32-bit audio sample I/O between DSP chips
— TDM I/O modes
Supports Different Fs Sample Rates
— Three integrated hardware SRC blocks
— Output can be master or slave
— Supports dual-domain Fs on S/PDIF vs. I
DSP Tool Set w/ Private Keys Protect Customer IP
Integrated Clock Manager/PLL
— Flexibility to operate from internal PLL, external crystal,
Input Fs Auto Detection w/ µC Acknowledgement
Host Control & Boot via I
Configurable GPIOs and External Interrupt Input
1.8V Core and a 3.3V I/O that is tolerant to 5V input
Low-power Mode
Table
Feature may differ on CS47024, CS47028, or CS47048.
http://www.cirrus.com
Y data or program memory
external oscillator
Channels of DAC output: 108dB DR, -98dB THD+N
Channels of ADC input: 105dB DR, -98dB THD+N
2.
2
C
or SPI
Stereo Inputs
On Analog in
ADC’s & DAC’s operate
in Single ended or
Differential mode
x4
SPI / I
Control
S/PDIF
ADC0/1
ADC2/3
I
2
I
S /
2
S
2
2
C
Serial Interface
S inputs
S
R
C
1
4ch
Copyright 2011 Cirrus Logic
(I
2
DBC
C Slave)
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Assignable to Program or Y Data memory
PIC
32K x 32-bit SRAM with three 2K blocks
DMA
CONFIDENTIAL
Coyote 32-bit Core
ROM
RAM
PLL
in the CS47048 DSP
x8
Manager
Clock
P
text
X
Y
The CS470xx is available in a 100-pin LQFP package with
exposed pad for better thermal characteristics. Both
Commercial (0
+85
Ordering Information:
See
The CS470xx family is a new generation of audio system-on-
a-chip (ASOC) processors targeted at high fidelity, cost
sensitive designs. Derived from the highly successful
CS48500 32-bit fixed point audio enhancement processor
family, the CS470xx further simplifies system design and
reduces total system cost by integrating the S/PDIF Rx,
S/PDIF Tx, analog inputs, analog outputs, and SRCs. For
example, a hardware SRC can down-sample a 192 kHz
S/PDIF stream to a lower Fs to reduce memory and MIPS
requirements for processing. This integration effectively
reduces the chip count from 3 to 1 which allows smaller, less
expensive board designs.
Target applications are:
The CS470xx is programmed using the simple yet powerful
Cirrus proprietary DSP Composer
pre-production tuning tool. Processing chains may be
designed using a drag-and-drop interface to place/utilize
functional macro audio DSP primitives and custom audio
filtering blocks. The end result is a software image that is
downloaded to the DSP via serial control port.
The Cirrus Framework
Assembly and C language compilers and other software
development tools for porting existing code to the CS470xx
family platform.
ROM
RAM
Timers
ROM
RAM
— Automotive Head Units & Outboard Amplifiers
— Automotive Processors & Automotive Integration Hubs
— Digital TV
— MP3 Docking Stations
— AVR and DVD RX
— DSP Controlled Speakers (e.g. Subwoofers, Sound
°
page 33
C) temperature grades.
GPIO
Bars)
8ch
8ch
R
C
S
2
S
R
C
3
for ordering information.
°
independent Channels
x2
x2
C to +70
I
2
S / S/PDIF
for In or Out
SRC3 has 8
DAC0
DAC1
DAC4
DAC5
DAC6
DAC2
DAC3
DAC7
I
2
S
CS470xx Data Sheet
°
programming environment offers
C) and Automotive (-40
GUI development and
DS787PP5
FEB 2011
°
C to

Related parts for CS47048C-DQZ

CS47048C-DQZ Summary of contents

Page 1

FEATURES  Cost-effective, High-performance 32-bit DSP — 300,000,000 MAC/S (multiply accumulates per second) — Dual MAC cycles per clock — 72-bit accumulators are the highest precision in the industry — 32K x 32-bit SRAM with three 2K blocks assignable to ...

Page 2

CS470xx Data Sheet Audio SOC Processor Family Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find the one nearest to you go to www.cirrus.com. IMPORTANT NOTICE “Preliminary” product information describes products ...

Page 3

Table of Contents FEATURES ......................................................................................................................... 1 1. Documentation Strategy .........................................................................................................6 2. Overview ..................................................................................................................................6 2.1 Licensing ............................................................................................................................................... 6 3. Code Overlays .........................................................................................................................7 4. Hardware Functional Description .......................................................................................10 4.1 Coyote 32-bit DSP Core ...................................................................................................................... 12 4.2 DSP Memory ....................................................................................................................................... 12 4.2.1 DMA ...

Page 4

CS470xx Data Sheet Audio SOC Processor Family 5.17.2 Analog Output Characteristics (Automotive) ........................................................................ 31 5.17.3 Combined DAC Interpolation & On-chip Analog Filter Response ........................................ 32 6. Ordering Information ............................................................................................................33 7. Environmental, Manufacturing, & Handling Information ..................................................33 8. Device Pinout Diagram ...

Page 5

Table 3. CS470xx Channel Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 6

CS470xx Data Sheet Audio SOC Processor Family 1. Documentation Strategy The CS470xx Data Sheet describes the CS47048, CS47028, and CS47024 audio processors. This document should be used in conjunction with the following documents when evaluating or designing a system around ...

Page 7

Code Overlays The suite of software available for the CS470xx family consists of an operating system (OS) and a library of overlays. The software components for the CS470xx family include: 1. OS/Kernel—Encompasses all non-audio processing tasks, including loading data ...

Page 8

CS470xx Data Sheet Audio SOC Processor Family Table 2. CS47048-CQZ Features CS47048-DQZ • 4-In/8-Out Car Audio • High-end Digital TV • Dual Source/Dual Zone Primary Applications Package DSP Core 32K x 32-bit SRAM with three 2K blocks x 32-bit SRAM, ...

Page 9

PCM/TDM Product TDM Out • lines, 2 channels per line CS47048 channels • 1 TDM line channels per line. 2 • ...

Page 10

CS470xx Data Sheet Audio SOC Processor Family 4. Hardware Functional Description The CS470xx family, which includes the CS47048, CS47028, and CS47024 DSPs true system-on-a-chip that combines a powerful 32-bit DSP engine with analog/digital audio inputs and analog/digital audio ...

Page 11

ADC’s & DAC’s operate in Single ended or Differential mode S/PDIF Stereo Inputs R On Analog ADC2/3 2 SPI / I C Control Figure 2. ADC’s & DAC’s ...

Page 12

CS470xx Data Sheet Audio SOC Processor Family 4.1 Cirrus Logic 32-bit DSP Core The CS470xx comes with a Cirrus Logic 32-bit core with separate X and Y data and P code memory spaces. The DSP core is a high-performance, 32-bit, ...

Page 13

On-chip DSP Peripherals 4.3.1 Analog to Digital Converter Port (ADC) The ADCs in the CS470xx devices feature dynamic range performance in excess of 100 dB. Please see Section 5.16 “ADC Characteristics” on page 27 performance. The CS47024 and CS47028 ...

Page 14

CS470xx Data Sheet Audio SOC Processor Family 4.3.7 Sample Rate Converters (SRC) All CS470xx devices have at least two internal hardware SRC modules. One is directly associated with the ADCs and normally serves to convert data from the 96/192 kHz ...

Page 15

Termination Requirements Open-drain pins on the CS470xx must be pulled high for proper operation. Please refer to the CS470xx Hardware User’s Manual to identify which pins are open-drain and what value of pull-up resistor is required for proper operation. ...

Page 16

CS470xx Data Sheet Audio SOC Processor Family 5. Characteristics and Specifications All data sheet minimum and maximum timing parameters are guaranteed over the rated voltage and Note: temperature. All data sheet typical parameters are measured under the following conditions: T ...

Page 17

Power Supply Characteristics Note: Measurements performed under operating conditions) Parameter Operational Power Supply Current: 1 VDD: Core and I/O operating VDDA: PLL operating current VDDA: DAC operating current (all 8 channels enabled) VDDA: ADC operating current (all 4 channels ...

Page 18

CS470xx Data Sheet Audio SOC Processor Family 5.6 Digital Switching Characteristics— RESET Parameter 1 RESET minimum pulse width low All bidirectional pins high-Z after RESET low Configuration pins setup before RESET high Configuration pins hold after RESET high 1.The rising ...

Page 19

Digital Switching Characteristics — XTI Parameter External Crystal operating frequency XTI period XTI high time XTI low time External Crystal Load Capacitance (parallel resonant) External Crystal Equivalent Series Resistance 1. Part characterized with the following crystal frequency values: 12.288 ...

Page 20

CS470xx Data Sheet Audio SOC Processor Family 5.9 Digital Switching Characteristics — Serial Control Port - SPI Slave Mode Parameter 1 SCP_CLK frequency SCP_CS falling to SCP_CLK rising SCP_CLK low time SCP_CLK high time Setup time SCP_MOSI input Hold time ...

Page 21

Digital Switching Characteristics — Serial Control Port - SPI Master Mode Parameter 1,2 SCP_CLK frequency 3 EE_CS falling to SCP_CLK rising SCP_CLK low time SCP_CLK high time Setup time SCP_MISO input Hold time SCP_MISO input SCP_CLK low to SCP_MOSI ...

Page 22

CS470xx Data Sheet Audio SOC Processor Family 5.11 Digital Switching Characteristics — Serial Control Port - I Parameter 1 SCP_CLK frequency SCP_CLK rise time SCP_CLK fall time SCP_CLK low time SCP_CLK high time SCP_CLK rising to SCP_SDA rising or falling ...

Page 23

Digital Switching Characteristics — Serial Control Port - I Parameter 1 SCP_CLK frequency SCP_CLK rise time SCP_CLK fall time SCP_CLK low time SCP_CLK high time SCP_CLK rising to SCP_SDA rising or falling for START or STOP condition START condition ...

Page 24

CS470xx Data Sheet Audio SOC Processor Family 5.13 Digital Switching Characteristics — Digital Audio Slave Input Port Parameter DAI_SCLK period DAI_SCLK duty cycle Setup time DAI_DATAn Hold time DAI_DATAn DAI_SCLK DAI_DATAn Figure 11 daidsu daidh Digital Audio ...

Page 25

Digital Switching Characteristics — Digital Audio Output Port Parameter DAO_MCLK period DAO_MCLK duty cycle DAO_SCLK period for Master or Slave mode DAO_SCLK duty cycle for Master or Slave mode Master Mode (Output A1 Mode) DAO_SCLK delay from DAO_MCLK rising ...

Page 26

CS470xx Data Sheet Audio SOC Processor Family t daosclk DAO_SCLK t daoslrts DAO_LRCLK t DAOn_DATAn A. DAO_LRCLK transition before DAO_SCLK non-active edge. See Footnote 3 on page 25. Figure 13. 5.15 Digital Switching Characteristics — S/PDIF RX Port (Inputs: Logic ...

Page 27

ADC Characteristics 5.16.1 Analog Input Characteristics (Commercial) Test Conditions (unless otherwise specified): T wave driven through the passive input filter (R ning test application; Measurement Bandwidth kHz. Parameter Fs= 96 kHz 1,6,7 Dynamic Range ...

Page 28

CS470xx Data Sheet Audio SOC Processor Family 5.16.2 Analog Input Characteristics (Automotive) Test Conditions (unless otherwise specified): T sine wave driven through the passive input filter (R running test application; Measurement Bandwidth kHz. Parameter Fs=96 ...

Page 29

AIN Figure 14. AIN- AIN+ Figure 15. DS787PP5 10µ AIN_xA+ AIN_xB+ 100K C L ADC Single-Ended Input Test Circuit 10µ AIN_xA- or AIN_xB- 100K C L 10µ AIN_xA+ or AIN_xB+ 100K ...

Page 30

CS470xx Data Sheet Audio SOC Processor Family 5.16.3 ADC Digital Filter Characteristics Parameter kHz Passband (Frequency Response) Passband Ripple Stopband Stopband Attenuation Total Group Delay High-Pass Filter Characteristics Frequency Response-3.0 dB -0.13 dB Phase Deviation @ 20 ...

Page 31

Analog Output Characteristics (Automotive) Test Conditions (unless otherwise specified): T sine wave driven through a filter shown in tion; Measurement Bandwidth kHz. Parameter kHz Dynamic Range A-weighted unweighted Total Harmonic Distortion ...

Page 32

CS470xx Data Sheet Audio SOC Processor Family AOUT_x- AOUT_x output output: R Figure 17. 125 100 5.17.3 Combined DAC Interpolation & On-chip Analog Filter Response Parameter Passband (Frequency Response) Frequency Response ...

Page 33

... CS47024C-CQZ CS47024C-DQZ NOTE: Please contact the factory for availability of the -D (automotive grade) package. 7. Environmental, Manufacturing, & Handling Information Table 6. Environmental, Manufacturing, and Handling Information Model Number CS47048C-CQZ CS47048C-DQZ CS47028C-CQZ CS47028C-DQZ CS47024C-CQZ CS47024C-DQZ * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. DS787PP5 Table 5. ...

Page 34

CS470xx Data Sheet Audio SOC Processor Family 8. Device Pinout Diagram 8.1 CS47048, 100-Pin LQFP Pinout Diagram 1 DBCK DBDA GPIO15, DAI_LRCLK GPIO17, DAI_SCLK VDDIO1 5 GNDIO1 GPIO16, DAI_DATA0, TM0 GPIO0, DAI_DATA1, TM1 GPIO1, DAI_DATA2, TM2 GPIO2, DAI_DATA3, TM3, SPDIF ...

Page 35

CS47028, 100-Pin LQFP Pinout Diagram DBCK 1 DBDA GPIO15, DAI_LRCLK GPIO17, DAI_SCLK 5 VDDIO1 GNDIO1 GPIO16, DAI_DATA0, TM0 GPIO0, DAI_DATA1, TM1 GPIO1, DAI_DATA2, TM2 10 GPIO2, DAI_DATA3, TM3, SPDIF RX VDD1 GND1 GPIO7, DAO_LRCLK GPIO14, DAO_SCLK GNDIO2 15 VDDIO2 ...

Page 36

CS470xx Data Sheet Audio SOC Processor Family 8.3 CS47024, 100-Pin LQFP Pinout Diagram DBCK 1 DBDA GPIO15, DAI_LRCLK GPIO17, DAI_SCLK VDDIO1 5 GNDIO1 GPIO16, DAI_DATA0, TM0 GPIO0, DAI_DATA1, TM1 GPIO1, DAI_DATA2, TM2 10 GPIO2, DAI_DATA3, TM3, SPDIF RX VDD1 GND1 ...

Page 37

Figure 22. 100-Pin LQFP Package Drawing ...

Page 38

CS470xx Data Sheet Audio SOC Processor Family 10. Parameter Definitions 10.1 Dynamic Range The ratio of the RMS value of the signal to the RMS sum of all other spectral components over the specified bandwidth. Dynamic Range is a signal-to-noise ...

Page 39

Revision History Revision Date A7 October 16, 2008 Initial Release A8 March 22, 2009 Added CS47028 and CS47024 products to the data sheet. Changed name of data sheet to CS470xx Data Sheet. Added note regarding necessity of power supplies ...

Page 40

CS470xx Data Sheet Audio SOC Processor Family Revision Date PP3 June 10, 2010 Table Sample Rates” row to indicate that CS47024 devices have the same features as the CS47048 and CS47028. Added “The CS47024 has the 8-channel SRC block” to ...

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