CS47048C-DQZ Cirrus Logic Inc, CS47048C-DQZ Datasheet - Page 14

• Manufacturer Part Number: CS47048C-DQZ
• Description: IC 4ch ADC 8ch DAC & Single Core 32-bit DSP Audio SoC (300M MACs)
• Manufacturer: Cirrus Logic Inc

Specifications of CS47048C-DQZ

• Operating Temperature Range: -40°C To +85°C
• No. Of Pins: 100
• Peak Reflow Compatible (260 C): Yes
• Frequency: 147MHz
• Embedded Interface Type: I2C, SPI
• Leaded Process Compatible: Yes
• Rohs Compliant: Yes
• Core Supply Voltage: 1.89V
• Digital Ic Case Style: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CS470xx Data Sheet
Audio SOC Processor Family
4.3.7 Sample Rate Converters (SRC)
4.3.8 Serial Control Port (I
4.3.9 GPIO
4.3.10 PLL-based Clock Generator
4.3.11 Hardware Watchdog Timer
4.4 DSP I/O Description
4.4.1 Multiplexed Pins
14
All CS470xx devices have at least two internal hardware SRC modules. One is directly associated
The other SRC module is directly associated with the DACs and normally serves to convert data
The CS47028 and CS47048 devices have an additional stand-alone 8-channel SRC module. This
The on-chip serial control port is capable of operating as master or slave in either
Many of the CS470xx peripheral pins are multiplexed with GPIO. Each GPIO can be configured as
The low-jitter PLL generates integer or fractional multiples of a reference frequency which are used
The CS470xx has an integrated watchdog timer that acts as a “health” monitor for the DSP. The
Many of the CS470xx pins are multi-functional. For details on pin functionality please refer to the
with the ADCs and normally serves to convert data from the 96/192 kHz sampling rate of the ADCs
to another Fs appropriate for mixing with other audio in the system. If the ADCs are not being used,
this SRC can convert up to 4 channels of audio data from one input sample rate (Fsi) to another
output sample rate (Fso).
from the DSP into the 96 kHz sample rate needed by the DACs. If the DACs are not being used,
this SRC can convert up to 8 channels of audio data from the one input sample rate (Fsi) to another
output sample rate (Fso).
SRC module can be used to make independent input clock domains synchronous (different Fs on
PCM input and S/PDIF Rx). The CS47024 has an additional 2-channel SRC module. The
CS47024 has the 8-channel SRC block.
Master/Slave operation is chosen by mode select pins when the CS470xx comes out of reset. The
serial clock pin can support frequencies as high as 25 MHz in SPI mode (SPI clock speed must
always be (DSP Core Frequency/2)). The CS470xx serial control port also includes a pin for flow
control of the communications interface (SCP_BSY) and a pin to indicate when the DSP has a
message for the host (SCP_IRQ).
an output, an input, or an input with interrupt. Each input-pin interrupt can be configured as rising
edge, falling edge, active-low, or active-high.
to clock the DSP core and peripherals. Through a second PLL divider chain, a dependent clock
domain can be output on the DAO port for driving audio converters. The CS470xx defaults to
running from the external reference frequency and is switched to use the PLL output after overlays
have been loaded and configured, either through master boot from an external FLASH or through
host control. A built-in crystal oscillator circuit with a buffered output is provided. The buffered
output frequency ratio is selectable between 1:1 (default) or 2:1.
watchdog timer must be reset by the DSP before the counter expires, or the entire chip is reset.
This peripheral ensures that the CS470xx will reset itself in the event of a temporary system failure.
In stand-alone mode (i.e. no host MCU), the DSP will reboot from external FLASH. In slave mode
(i.e. host MCU present) a GPIO will be used to signal the host that the watchdog has expired and
the DSP should be rebooted and re-configured.
CS470xx Hardware User’s Manual.
2
C or SPI)
Copyright 2011 Cirrus Logic
SPI or I
2
C
DS787PP5
modes.